4.8GHz CMOS frequency multiplier with subharmonic pulse-injection locking

2007 IEEE Asian Solid-State Circuits Conference, A-SSCC

Volumn , Issue , 2007, Pages 336-339

  Takano, Kyoya ^a   Motoyoshi, Mizuki ^a   Fujishima, Minoru ^a  

^a UNIVERSITY OF TOKYO   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; FREQUENCY SYNTHESIZERS; PHASE NOISE; SIGNAL GENERATORS; SPURIOUS SIGNAL NOISE;

FREQUENCY MULTIPLIERS;

FREQUENCY MULTIPLYING CIRCUITS;

EID: 51349132375     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ASSCC.2007.4425699     Document Type: Conference Paper

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