-
1
-
-
0000200936
-
A 2.6-GHz/5.2-GHz frequency synthesizer in 0.4-μm CMOS technology
-
May
-
C. Lam and B. Razavi, "A 2.6-GHz/5.2-GHz frequency synthesizer in 0.4-μm CMOS technology," IEEE J. Solid-State Circuits, vol. 35, pp. 788-794, May 2000.
-
(2000)
IEEE J. Solid-State Circuits
, vol.35
, pp. 788-794
-
-
Lam, C.1
Razavi, B.2
-
2
-
-
0013019272
-
A CMOS frequency synthesizer with an injection locked frequency divider for a 5-GHz wireless LAN receiver
-
May
-
H. R. Rategh, H. Samavati, and T. H. Lee, "A CMOS frequency synthesizer with an injection locked frequency divider for a 5-GHz wireless LAN receiver," IEEE J. Solid-State Circuits, vol. 35, pp. 780-787, May 2000.
-
(2000)
IEEE J. Solid-State Circuits
, vol.35
, pp. 780-787
-
-
Rategh, H.R.1
Samavati, H.2
Lee, T.H.3
-
3
-
-
0034863236
-
A fully integrated CMOS frequency synthesizer for Bluetooth
-
Phoenix, AZ, May
-
D. Theil, C. Durdodt, A. Hanke, S. Heinen, S. Waasen, D. Seippel, D. Pham-Stabner, and K. Schumacher, "A fully integrated CMOS frequency synthesizer for Bluetooth," in Proc. Symp. Radio Frequency Integrated Circuits, Phoenix, AZ, May 2001, pp. 103-106.
-
(2001)
Proc. Symp. Radio Frequency Integrated Circuits
, pp. 103-106
-
-
Theil, D.1
Durdodt, C.2
Hanke, A.3
Heinen, S.4
Waasen, S.5
Seippel, D.6
Pham-Stabner, D.7
Schumacher, K.8
-
4
-
-
0032671890
-
A 1.6-GHz dual modulus prescaler using the extended true-single-phase-clock CMOS circuit technique (E-TSPC)
-
Jan.
-
J. N. Soares and W. A. M. Van Noije, "A 1.6-GHz dual modulus prescaler using the extended true-single-phase-clock CMOS circuit technique (E-TSPC)," IEEE J. Solid-State Circuits, vol. 34, pp. 97-102, Jan. 1999.
-
(1999)
IEEE J. Solid-State Circuits
, vol.34
, pp. 97-102
-
-
Soares, J.N.1
Van Noije, W.A.M.2
-
5
-
-
0035446351
-
2-GHz/2-mW and 12-GHz/30-mW dual-modulus prescaler in silicon bipolar technology
-
Sept.
-
H. Knapp, J. Bock, M. Wurzer, G. Ritzberger, K. Aufinger, and L. Treitinger, "2-GHz/2-mW and 12-GHz/30-mW dual-modulus prescaler in silicon bipolar technology," IEEE J. Solid-State Circuits, vol. 36, pp. 1420-1423, Sept. 2001.
-
(2001)
IEEE J. Solid-State Circuits
, vol.36
, pp. 1420-1423
-
-
Knapp, H.1
Bock, J.2
Wurzer, M.3
Ritzberger, G.4
Aufinger, K.5
Treitinger, L.6
-
6
-
-
0034227707
-
A family of low-power truly modular programmable dividers in standard 0.35-μm CMOS technology
-
July
-
C. S. Vaucher, I. Ferencic, M. Locher, S. Sedvallson, U. Voegeli, and Z. Wang, "A family of low-power truly modular programmable dividers in standard 0.35-μm CMOS technology," IEEE J. Solid-State Circuits, vol. 35, pp. 1039-1045, July 2000.
-
(2000)
IEEE J. Solid-State Circuits
, vol.35
, pp. 1039-1045
-
-
Vaucher, C.S.1
Ferencic, I.2
Locher, M.3
Sedvallson, S.4
Voegeli, U.5
Wang, Z.6
-
7
-
-
0030188644
-
A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-μm CMOS
-
July
-
J. Craninckx and M. S. J. Steyaert, "A 1.75-GHz/3-V dual-modulus divide-by-128/129 prescaler in 0.7-μm CMOS," IEEE J. Solid-State Circuits, vol. 31, pp. 890-897, July 1996.
-
(1996)
IEEE J. Solid-State Circuits
, vol.31
, pp. 890-897
-
-
Craninckx, J.1
Steyaert, M.S.J.2
-
8
-
-
0003457256
-
-
Ph.D. dissertation, Mass. Inst. Technol., Cambridge, MA
-
M. H. Perrott, "Techniques for high data rate modulation and low power operation of fractional-N frequency synthesizer," Ph.D. dissertation, Mass. Inst. Technol., Cambridge, MA, 1997.
-
(1997)
Techniques for High Data Rate Modulation and Low Power Operation of Fractional-N Frequency Synthesizer
-
-
Perrott, M.H.1
-
9
-
-
0032597712
-
A 1.5 GHz, sub-2 mW CMOS dual modulus prescaler
-
San Diego, CA
-
A. Benachour, S. H. K. Embabi, and A. Ali, "A 1.5 GHz, sub-2 mW CMOS dual modulus prescaler," in Proc. IEEE Custom Integrated Circuits Conf., San Diego, CA, 1999, pp. 613-616.
-
(1999)
Proc. IEEE Custom Integrated Circuits Conf.
, pp. 613-616
-
-
Benachour, A.1
Embabi, S.H.K.2
Ali, A.3
-
10
-
-
0034228929
-
A 5.3-GHz programmable divider for HiperLAN in 0.25 μm CMOS
-
July
-
N. Krishnapura and P. R. Kinget, "A 5.3-GHz programmable divider for HiperLAN in 0.25 μm CMOS," IEEE J. Solid-State Circuits, vol. 35, pp. 1019-1024, July 2000.
-
(2000)
IEEE J. Solid-State Circuits
, vol.35
, pp. 1019-1024
-
-
Krishnapura, N.1
Kinget, P.R.2
-
11
-
-
0028385043
-
Cell-based fully integrated CMOS frequency synthesizers
-
Mar.
-
D. Mijuskovic, M. J. Bayer, T. F. Chomicz, N. K. Garg, F. James, P. W. McEntarfer, and J. A. Porter, "Cell-based fully integrated CMOS frequency synthesizers," IEEE J. Solid-State Circuits, vol. 29, pp. 271-279, Mar. 1994.
-
(1994)
IEEE J. Solid-State Circuits
, vol.29
, pp. 271-279
-
-
Mijuskovic, D.1
Bayer, M.J.2
Chomicz, T.F.3
Garg, N.K.4
James, F.5
McEntarfer, P.W.6
Porter, J.A.7
-
12
-
-
0032309765
-
A fully integrated CMOS DCS-1800 frequency synthesizer
-
Dec.
-
J. Craninckx and M. S. J. Steyaert, "A fully integrated CMOS DCS-1800 frequency synthesizer," IEEE J. Solid-State Circuits, vol. 33, pp. 2054-2065, Dec. 1998.
-
(1998)
IEEE J. Solid-State Circuits
, vol.33
, pp. 2054-2065
-
-
Craninckx, J.1
Steyaert, M.S.J.2
-
13
-
-
0032647446
-
A 2-V 1.8-GHz BJT phase-locked loop
-
June
-
W. Chen and J. Wu, "A 2-V 1.8-GHz BJT phase-locked loop," IEEE J. Solid-State Circuits, vol. 34, pp. 784-789, June 1999.
-
(1999)
IEEE J. Solid-State Circuits
, vol.34
, pp. 784-789
-
-
Chen, W.1
Wu, J.2
-
14
-
-
0036540018
-
A 1.5-V 900-MHz monolithic CMOS fast-switching frequency synthesizer for wireless applications
-
Apr.
-
C. Lo and H. C. Luong, "A 1.5-V 900-MHz monolithic CMOS fast-switching frequency synthesizer for wireless applications," IEEE J. Solid-State Circuits, vol. 37, pp. 459-470, Apr. 2002.
-
(2002)
IEEE J. Solid-State Circuits
, vol.37
, pp. 459-470
-
-
Lo, C.1
Luong, H.C.2
-
15
-
-
0036564736
-
A fully integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems
-
May
-
Y. Koo, H. Huh, Y. Cho, J. Lee, J. Park, K. Lee, D. Jeong, and W. Kim, "A fully integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems," IEEE J. Solid-State Circuits, vol. 37, pp. 536-542, May 2002.
-
(2002)
IEEE J. Solid-State Circuits
, vol.37
, pp. 536-542
-
-
Koo, Y.1
Huh, H.2
Cho, Y.3
Lee, J.4
Park, J.5
Lee, K.6
Jeong, D.7
Kim, W.8
-
16
-
-
0034459330
-
A 60-dB dynamic range CMOS sixth-order 2.4-Hz low-pass filter for medical applications
-
Dec.
-
S. Solis-Bustos, J. Silva-Martínez, F. Maloberti, and E. Sánchez-Sinencio, "A 60-dB dynamic range CMOS sixth-order 2.4-Hz low-pass filter for medical applications," IEEE Trans. Circuits Syst. II, vol. 47, pp. 1391-1398, Dec. 2000.
-
(2000)
IEEE Trans. Circuits Syst. II
, vol.47
, pp. 1391-1398
-
-
Solis-Bustos, S.1
Silva-Martínez, J.2
Maloberti, F.3
Sánchez-Sinencio, E.4
-
17
-
-
0026169365
-
A multiple modulator fractional divider
-
June
-
B. Miller and R. J. Conley, "A multiple modulator fractional divider," IEEE Trans. Instrum. Meas., vol. 40, pp. 578-583, June 1991.
-
(1991)
IEEE Trans. Instrum. Meas.
, vol.40
, pp. 578-583
-
-
Miller, B.1
Conley, R.J.2
-
18
-
-
0027590694
-
Delta-sigma modulation in fractional-N frequency synthesis
-
May
-
T. A. Riley, M. Copeland, and T. Kwasniewski, "Delta-sigma modulation in fractional-N frequency synthesis," IEEE J. Solid-State Circuits, vol. 28, pp. 553-559, May 1993.
-
(1993)
IEEE J. Solid-State Circuits
, vol.28
, pp. 553-559
-
-
Riley, T.A.1
Copeland, M.2
Kwasniewski, T.3
-
19
-
-
51849088730
-
A comparative study of digital ΣΔ modulators for fractional-N synthesis
-
Malta, Sept.
-
K. Shu, E. Sánchez-Sinencio, F. Maloberti, and U. Eduri, "A comparative study of digital ΣΔ modulators for fractional-N synthesis," in Proc. IEEE Int. Conf. Electronics, Circuits, and Systems (ICECS), Malta, Sept. 2001, pp. 1391-1394.
-
(2001)
Proc. IEEE Int. Conf. Electronics, Circuits, and Systems (ICECS)
, pp. 1391-1394
-
-
Shu, K.1
Sánchez-Sinencio, E.2
Maloberti, F.3
Eduri, U.4
|