A digitally controlled pll for SoC applications

IEEE Journal of Solid-State Circuits

Volumn 39, Issue 5, 2004, Pages 751-760

  Olsson, Thomas ^a   Nilsson, Peter ^a  

^a LUND UNIVERSITY   (Sweden)

Author keywords

Oscillator; Phase locked loop (PLL); Time to digital; VHDL

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DIGITAL CONTROL SYSTEMS; ELECTRIC POTENTIAL; MICROPROCESSOR CHIPS; MULTIPLYING CIRCUITS;

DIGITAL SYSTEM SIMULATION; PHASE DETECTORS; VHDL;

PHASE LOCKED LOOPS;

EID: 2442446545     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2004.826333     Document Type: Article

References (13)

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