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Volumn 29, Issue 9, 2008, Pages 994-997

Effective crosstalk isolation with post-CMOS selectively grown porous silicon technique for radio frequency system-on-chip (SOC) applications

Author keywords

Crosstalk isolation; Post CMOS; Radio frequency (RF); Selectively grown porous silicon (SGPS); Substrate selective transformation engineering; System on chip (SOC)

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER NETWORKS; CROSSTALK; ELECTROMAGNETIC WAVES; INTEGRATED CIRCUITS; PROGRAMMABLE LOGIC CONTROLLERS; RADIO; RADIO WAVES; SEMICONDUCTING SILICON COMPOUNDS; SEPARATION; SILICON; SPACE OPTICS; SUBSTRATES;

EID: 50649102886     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2008.2001479     Document Type: Article
Times cited : (7)

References (17)
  • 1
    • 0032122009 scopus 로고    scopus 로고
    • Monolithic packaging concepts for high isolation in circuits and antennas
    • Jul
    • R. F. Drayton, R. M. Henderson, and L. P. B. Katehi, "Monolithic packaging concepts for high isolation in circuits and antennas," IEEE Trans. Microw. Theory Tech., vol. 46, no. 7, pp. 900-906, Jul. 1998.
    • (1998) IEEE Trans. Microw. Theory Tech , vol.46 , Issue.7 , pp. 900-906
    • Drayton, R.F.1    Henderson, R.M.2    Katehi, L.P.B.3
  • 2
    • 0030126721 scopus 로고    scopus 로고
    • Substrate crosstalk in BiCMOS mixed mode integrated circuits
    • Apr
    • K. Joardar, "Substrate crosstalk in BiCMOS mixed mode integrated circuits," Solid State Electron., vol. 39, no. 4, pp. 511-516, Apr. 1996.
    • (1996) Solid State Electron , vol.39 , Issue.4 , pp. 511-516
    • Joardar, K.1
  • 3
    • 0035696726 scopus 로고    scopus 로고
    • Improved latch-up immunity in junction-isolated smart power ICs with unbiased guard ring
    • Dec
    • S. Gupta, J. C. Beckman, and S. L. Kosier, "Improved latch-up immunity in junction-isolated smart power ICs with unbiased guard ring," IEEE Electron Device Lett., vol. 22, no. 12, pp. 600-602, Dec. 2001.
    • (2001) IEEE Electron Device Lett , vol.22 , Issue.12 , pp. 600-602
    • Gupta, S.1    Beckman, J.C.2    Kosier, S.L.3
  • 8
    • 27144442793 scopus 로고    scopus 로고
    • Low capacitance and high isolation bond pad for high frequency RFICs
    • Oct
    • K. Chong and Y. H. Xie, "Low capacitance and high isolation bond pad for high frequency RFICs," IEEE Electron Device Lett., vol. 26, no. 10, pp. 746-748, Oct. 2005.
    • (2005) IEEE Electron Device Lett , vol.26 , Issue.10 , pp. 746-748
    • Chong, K.1    Xie, Y.H.2
  • 9
    • 0141918454 scopus 로고    scopus 로고
    • The importance of distributed grounding in combination with porous Si trenches for the reduction of RF crosstalk through p-Si substrate
    • Aug
    • H. S. Kim, K. C. Chong, Y. H. Xie, and K. A. Jenkins, "The importance of distributed grounding in combination with porous Si trenches for the reduction of RF crosstalk through p-Si substrate," IEEE Electron Device Lett., vol. 24, no. 8, pp. 640-642, Aug. 2003.
    • (2003) IEEE Electron Device Lett , vol.24 , Issue.8 , pp. 640-642
    • Kim, H.S.1    Chong, K.C.2    Xie, Y.H.3    Jenkins, K.A.4
  • 12
    • 34547778440 scopus 로고    scopus 로고
    • High- Q integrated inductor using post-CMOS selectively grown porous silicon (SGPS) technique for RFIC applications
    • Aug
    • C. Li, H. L. Liao, C. Wang, J. Yin, R. Huang, and Y. Y. Wang, "High- Q integrated inductor using post-CMOS selectively grown porous silicon (SGPS) technique for RFIC applications," IEEE Electron Device Lett., vol. 28, no. 8, pp. 763-766, Aug. 2007.
    • (2007) IEEE Electron Device Lett , vol.28 , Issue.8 , pp. 763-766
    • Li, C.1    Liao, H.L.2    Wang, C.3    Yin, J.4    Huang, R.5    Wang, Y.Y.6
  • 13
    • 0033726229 scopus 로고    scopus 로고
    • Porous silicon: A quantum sponge structure for silicon based optoelectronics
    • Apr
    • O. Bisi, S. Ossicini, and L. Pavesi, "Porous silicon: A quantum sponge structure for silicon based optoelectronics," Surf. Sci. Rep., vol. 38, no. 1, pp. 1-126, Apr. 2000.
    • (2000) Surf. Sci. Rep , vol.38 , Issue.1 , pp. 1-126
    • Bisi, O.1    Ossicini, S.2    Pavesi, L.3
  • 15
    • 34250783933 scopus 로고    scopus 로고
    • High-performance integrated inductor and effective crosstalk isolation using post-CMOS selective grown porous silicon technique for RFIC applications
    • Jun
    • C. Li, H. L. Liao, L. Yang, and R. Huang, "High-performance integrated inductor and effective crosstalk isolation using post-CMOS selective grown porous silicon technique for RFIC applications," Solid State Electron., vol. 51, no. 6, pp. 989-994, Jun. 2007.
    • (2007) Solid State Electron , vol.51 , Issue.6 , pp. 989-994
    • Li, C.1    Liao, H.L.2    Yang, L.3    Huang, R.4
  • 16
    • 0033875648 scopus 로고    scopus 로고
    • Physical modeling of spiral inductors on silicon
    • Mar
    • C. P. Yue and S. S. Wong, "Physical modeling of spiral inductors on silicon," IEEE Trans. Electron Devices, vol. 47, no. 3, pp. 560-568, Mar. 2000.
    • (2000) IEEE Trans. Electron Devices , vol.47 , Issue.3 , pp. 560-568
    • Yue, C.P.1    Wong, S.S.2
  • 17
    • 31044456941 scopus 로고    scopus 로고
    • Characteristic-function approach to parameter extraction for asymmetric equivalent circuit of on-chip spiral inductors
    • Jan
    • F. Y. Huang, N. Jiang, and E. Bian, "Characteristic-function approach to parameter extraction for asymmetric equivalent circuit of on-chip spiral inductors," IEEE Trans. Microw. Theory Tech., vol. 54, no. 1, pp. 115-119, Jan. 2006.
    • (2006) IEEE Trans. Microw. Theory Tech , vol.54 , Issue.1 , pp. 115-119
    • Huang, F.Y.1    Jiang, N.2    Bian, E.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.