-
2
-
-
25944453609
-
Effect of substrate material on crosstalk in mixed analog/digital integrated circuits
-
R. B. Merrill, W. M. Young, and K.Kevin Brehmer, "Effect of substrate material on crosstalk in mixed analog/digital integrated circuits," in IEDM Tech. Dig., 1994, pp. 17,2.1-17.2.4..
-
(1994)
IEDM Tech. Dig.
, pp. 1721-1724
-
-
Merrill, R.B.1
Young, W.M.2
Kevin Brehmer, K.3
-
3
-
-
0030126721
-
Substrate crosstalk in BiCMOS mixed mode integrated circuits
-
Apr.
-
K. Joardar, "Substrate crosstalk in BiCMOS mixed mode integrated circuits," Solid State Electron, vol. 39, pp. 511-516, Apr. 1996.
-
(1996)
Solid State Electron
, vol.39
, pp. 511-516
-
-
Joardar, K.1
-
4
-
-
0031341419
-
Substrate crosstalk reduction using SOI technology
-
Dec.
-
J. P. Raskin, A. Viviani, D. Flandre, and J. P. Colinge, "Substrate crosstalk reduction using SOI technology," IEEE Trans. Electron Devices, vol. 44, pp. 2252-2261, Dec. 1997.
-
(1997)
IEEE Trans. Electron Devices
, vol.44
, pp. 2252-2261
-
-
Raskin, J.P.1
Viviani, A.2
Flandre, D.3
Colinge, J.P.4
-
5
-
-
0000510384
-
A faraday cage isolation structures for substrate crosstalk suppression
-
Oct.
-
J. H. Wu, J. Scholvin, J. A. Alamo, and K. A. Jenkins, "A faraday cage isolation structures for substrate crosstalk suppression," IEEE Trans. Microwave Wireless Compon. Lett., vol. 11, pp. 410-412, Oct. 2001.
-
(2001)
IEEE Trans. Microwave Wireless Compon. Lett.
, vol.11
, pp. 410-412
-
-
Wu, J.H.1
Scholvin, J.2
Alamo, J.A.3
Jenkins, K.A.4
-
6
-
-
25944469110
-
A micromachining post-process module for RF silicon technology
-
N. P. Pham, K. T. Ng, M. Bartek, P. M. Sarro, B. Rejaei, and J. N. Burghartz, "A micromachining post-process module for RF silicon technology," in IEDM Tech. Dig., 2000, pp. 20.2.1-20.2.4.
-
(2000)
IEDM Tech. Dig.
, pp. 2021-2024
-
-
Pham, N.P.1
Ng, K.T.2
Bartek, M.3
Sarro, P.M.4
Rejaei, B.5
Burghartz, J.N.6
-
7
-
-
0036118190
-
Reducing silicon-substrate parasitics of on-chip transformers
-
Las Vegas, NV, Jan.
-
H. Jiang, Z. Li, and N. C. Tien, "Reducing silicon-substrate parasitics of on-chip transformers," in Proc. IEEE Micro. Electro. Mechanical Syst. Conf., Las Vegas, NV, Jan. 2002, pp. 649-652.
-
(2002)
Proc. IEEE Micro. Electro. Mechanical Syst. Conf.
, pp. 649-652
-
-
Jiang, H.1
Li, Z.2
Tien, N.C.3
-
8
-
-
0343782309
-
An approach for fabricating high-performance inductors on low-resistivity substrates
-
Sept.
-
Y. H. Xie, M. R. Frei, A. J. Becker, C. A. King, D. Kossives, L. T. Gomez, and S. K. Theiss, "An approach for fabricating high-performance inductors on low-resistivity substrates," IEEE J. Solid-State Circuits, vol. 33, pp. 1433-1438, Sept. 1998.
-
(1998)
IEEE J. Solid-state Circuits
, vol.33
, pp. 1433-1438
-
-
Xie, Y.H.1
Frei, M.R.2
Becker, A.J.3
King, C.A.4
Kossives, D.5
Gomez, L.T.6
Theiss, S.K.7
-
9
-
-
0035155229
-
Status and trends of silicon RF technology
-
Jan.
-
J. N. Burghartz, "Status and trends of silicon RF technology," Microelectron. Ret., vol. 4], pp. 13-19, Jan. 2001.
-
(2001)
Microelectron. Ret.
, vol.41
, pp. 13-19
-
-
Burghartz, J.N.1
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