Long term gate dielectric stress - A timely method?

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 2006, Pages

  Vollertsen, R P ^a   Pompl, T ^a   Duschl, R ^a   Kerber, A ^b   Kerber, M ^a   Rohner M ^a   Schwab, R ^a  

^a INFINEON TECHNOLOGIES AG   (Germany)

^b QIMONDA DRESDEN GMBH AND CO OHG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

GATE DIELECTRICS; GATES (TRANSISTOR);

BREAKDOWN BEHAVIOR; DIELECTRIC STRESSING; GATE DIELECTRIC RELIABILITY; LONG TERM; LONG-TERM STRESSES; MODEL VERIFICATION; STRESS TIMES; TIME SAVINGS;

ELECTRON DEVICES;

EID: 46049107973     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IEDM.2006.346894     Document Type: Conference Paper

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