A CMOS readout circuit for SOI resonant accelerometer with 4-μg bias stability and 20-μg/√Hz resolution

IEEE Journal of Solid-State Circuits

Volumn 43, Issue 6, 2008, Pages 1480-1490

  He, Lin ^a,b   Xu, Yong Ping ^a,c   Palaniapan, Moorthi ^c  

^a IEEE

^b UNIVERSITY OF FREIBURG   (Germany)

^c NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

Accelerometer; Bias stability; MEMS resonator; Oscillator; Phase noise

Indexed keywords

ACCELEROMETERS; CMOS INTEGRATED CIRCUITS; DIFFERENTIAL AMPLIFIERS; ELECTRIC NETWORK TOPOLOGY; HUMAN REHABILITATION ENGINEERING; METALLIZING; MICROFLUIDICS; SYSTEM STABILITY;

(+ MOD 2N) OPERATION; 1 / F NOISE; AUTOMATIC AMPLITUDE CONTROL (AMC); BIAS STABILITY; CIRCUIT TOPOLOGIES; FEEDTHROUGH; FULLY DIFFERENTIAL; LOOP FILTERING; LOW NOISE; READ-OUT CIRCUIT; RESONANT ACCELEROMETERS; SCALING FACTORS; SECOND ORDERS; STIFFENING EFFECT; TIME DOMAIN (OCT);

READOUT SYSTEMS;

EID: 44649157021     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2008.923616     Document Type: Article

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