Litho variations and their impact on the electrical yield of a 32nm node 6T SRAM cell

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 6925, Issue , 2008, Pages

  Verhaegen, Staf ^a   Cosemans, Stefan ^b   Dusa, Mircea ^c   Marchal, Pol ^a   Nackaerts, Axel ^a   Vandenberghe, Geert ^a   Dehaene, Wim ^b  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c ASML   (Netherlands)

Author keywords

CD uniformity; Line width roughness; Overlay; SRAM; Yield

Indexed keywords

COMPACT DISKS; COMPUTER SIMULATION; LOGIC CIRCUITS; STATIC RANDOM ACCESS STORAGE; SURFACE ROUGHNESS;

OVERLAY; PARASITIC EXTRACTORS;

VLSI CIRCUITS;

EID: 43249098874     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.773333     Document Type: Conference Paper

References (14)

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