Fault emulation for dependability evaluation of VLSI systems

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 16, Issue 4, 2008, Pages 422-431

  De Andres, David ^a   Ruiz, Juan Carlos ^a   Gil, Daniel ^a   Gil, Pedro ^a  

^a UNIVERSITAT POLITÈCNICA DE VALÈNCIA   (Spain)

Author keywords

Fault injection; Field programmable gate arrays (FPGAs); Run time reconfiguration; Validation of VLSI circuits

Indexed keywords

BENCHMARKING; FAILURE ANALYSIS; FIELD PROGRAMMABLE GATE ARRAYS (FPGA); SEMICONDUCTOR DEVICES;

FAULT INJECTION; VALIDATION OF VLSI CIRCUITS;

VLSI CIRCUITS;

EID: 41549110805     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2008.917428     Document Type: Article

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