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Volumn 29, Issue 3, 2008, Pages 206-208

Vertical enhancement-mode InAs nanowire field-effect transistor with 50-nm wrap gate

Author keywords

Field effect transistor (FET); InAs; Nanowires

Indexed keywords

GATE DIELECTRICS; INDIUM ARSENIDE; NANOWIRES; THRESHOLD VOLTAGE; TRANSCONDUCTANCE;

EID: 40749151146     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2007.915374     Document Type: Article
Times cited : (165)

References (13)
  • 2
    • 0031079417 scopus 로고    scopus 로고
    • Scaling theory for cylindrical, fully-depleted, surrounding-gate MOSFET's
    • Feb
    • C. P. Auth and J. D. Plummer, "Scaling theory for cylindrical, fully-depleted, surrounding-gate MOSFET's," IEEE Electron Device Lett., vol. 18, no. 2, pp. 74-76, Feb. 1997.
    • (1997) IEEE Electron Device Lett , vol.18 , Issue.2 , pp. 74-76
    • Auth, C.P.1    Plummer, J.D.2
  • 5
    • 4143108889 scopus 로고    scopus 로고
    • Single crystal nanowire vertical surround-gate field-effect transistor
    • Jul
    • H. T. Ng, J. Han, T. Yamada, P. Nguyen, Y. P. Chen, and M. Meyyappan, "Single crystal nanowire vertical surround-gate field-effect transistor," Nano Lett., vol. 4, no. 7, pp. 1247-1252, Jul. 2004.
    • (2004) Nano Lett , vol.4 , Issue.7 , pp. 1247-1252
    • Ng, H.T.1    Han, J.2    Yamada, T.3    Nguyen, P.4    Chen, Y.P.5    Meyyappan, M.6
  • 6
    • 34047259517 scopus 로고    scopus 로고
    • Vertical surround-gated silicon nanowire impact ionization field-effect transistors
    • Apr
    • M. T. Bjork, O. Hayden, H. Schmid, H. Riel, and W. Riess, "Vertical surround-gated silicon nanowire impact ionization field-effect transistors," Appl. Phys. Lett., vol. 90, no. 14, p. 142 110, Apr. 2007.
    • (2007) Appl. Phys. Lett , vol.90 , Issue.14 , pp. 142-110
    • Bjork, M.T.1    Hayden, O.2    Schmid, H.3    Riel, H.4    Riess, W.5
  • 7
    • 32044458180 scopus 로고    scopus 로고
    • Realization of a silicon nanowire vertical surround-gate field-effect transistor
    • Jan
    • V. Schmidt, H. Riel, S. Senz, S. Karg, W. Riess, and U. Gösele, "Realization of a silicon nanowire vertical surround-gate field-effect transistor," Small, vol. 2, no. 1, pp. 85-88, Jan. 2006.
    • (2006) Small , vol.2 , Issue.1 , pp. 85-88
    • Schmidt, V.1    Riel, H.2    Senz, S.3    Karg, S.4    Riess, W.5    Gösele, U.6
  • 9
    • 0037033988 scopus 로고    scopus 로고
    • Growth of nanowire superlattice structures for nanoscale photonics and electronics
    • Feb
    • M. S. Gudiksen, L. J. Lauhon, J. Wang, D. C. Smith, and C. M. Lieber, "Growth of nanowire superlattice structures for nanoscale photonics and electronics," Nature, vol. 415, no. 6872, pp. 617-620, Feb. 2002.
    • (2002) Nature , vol.415 , Issue.6872 , pp. 617-620
    • Gudiksen, M.S.1    Lauhon, L.J.2    Wang, J.3    Smith, D.C.4    Lieber, C.M.5
  • 13
    • 34547779456 scopus 로고    scopus 로고
    • High transconductance MISFET with a single InAs nanowire channel
    • Aug
    • Q.-T. Do, K. Blekker, I. Regolin, W. Prost, and F. J. Tegude, "High transconductance MISFET with a single InAs nanowire channel," IEEE Electron Device Lett., vol. 28, no. 8, pp. 682-684, Aug. 2007.
    • (2007) IEEE Electron Device Lett , vol.28 , Issue.8 , pp. 682-684
    • Do, Q.-T.1    Blekker, K.2    Regolin, I.3    Prost, W.4    Tegude, F.J.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.