Design-time optimization of post-silicon tuned circuits using adaptive body bias

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 27, Issue 3, 2008, Pages 481-493

  Kulkarni, Sarvesh H ^b,c   Sylvester, Dennis M ^a,b   Blaauw, David T ^b  

^a IEEE

^b UNIVERSITY OF MICHIGAN   (United States)

^c INTEL CORPORATION   (United States)

Author keywords

Adaptive body bias (ABB); Post silicon tuning; Variability; Very large scale integration

Indexed keywords

BIAS CURRENTS; CONTROL SYSTEMS; DIGITAL CIRCUITS; LSI CIRCUITS; OPTIMIZATION;

ADAPTIVE BODY BIAS (ABB); POST-SILICON TUNING;

ADAPTIVE SYSTEMS;

EID: 39749127776     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2008.915529     Document Type: Article

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