Thermal resistance of metamorphic InP-based HBTs on GaAs substrates using a linearly graded InxGa1-xP metamorphic buffer

IEEE Transactions on Electron Devices

Volumn 51, Issue 8, 2004, Pages 1221-1227

  Yang, Hong ^a   Wang, Hong ^a   Radhakrishnan, K ^a   Tan, Chee Leong ^b  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b DSO NATIONAL LABORATORIES   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; EPITAXIAL GROWTH; HEAT RESISTANCE; MATHEMATICAL MODELS; OPTIMIZATION; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTING INDIUM PHOSPHIDE; THERMAL CONDUCTIVITY;

GROWTH OPTIMIZATION; METAMORPHIC; METAMORPHIC BUFFER;

HETEROJUNCTION BIPOLAR TRANSISTORS;

EID: 3943083469     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.831364     Document Type: Article

References (32)

1. D. C. Dumka, H. Q. Tserng, M. Y. Kao, E. A. Beam III, and P. Saunier, "High-performance double-recessed enhancement-mode metamorphic HEMTs on 4-in GaAs substrates," IEEE Electron Device Lett., vol. 24, pp. 135-137, Feb. 2003.
2. M. Zaknoune, B. Bonte, C. Gaquiere, Y. Cordier, Y. Druelle, D. Theron, and Y. Crosnier, "InAlAs/InGaAs metamorphic HEMT with high current density and high breakdown voltage," IEEE Electron Device Lett., vol. 19, pp. 345-347, Apr. 1998.
3. 0.47As/InP double heterojunction bipolar transistors on GaAs substrates," IEEE Electron Device Lett., vol. 21, pp. 379-381, Apr, 2000.
4. 0.47As/InP double HBTs on GaAs substrates," IEEE Electron Device Lett., vol. 23, pp. 297-299, Mar. 2002.
5. 0.47As as heterojunction bipolar transistors grown on GaAs substrates," J. Electron. Mater., vol. 31, pp. 196-199, 2002.
6. A. W. Jackson, J. P. Ibbetson, A. C. Gossard, and U. K. Mishra, "Reduced thermal conductivity in low-temperature-grown GaAs," Appl. Phys. Lett., vol. 74, no. 16, pp. 2325-2327, 1999.
7. D. Kotchetkov, J. Zou, A. A. Balandin, D. I. Florescu, and F. H. Pollak, "Effect of dislocations on thermal conductivity of GaN layers," Appl. Phys. Lett., vol. 79, no. 26, pp. 4316-4318, 2001.
8. Y. M. Kim, M. Dahlstrom, M. J. W. Rodwell, and A. C. Gossard, "Thermal properties of metamorphic buffer materials for growth of InP double heterojunction bipolar transistors on GaAs substrate," IEEE Trans. Electron Devices, vol. 50, pp. 1411-1413, Nov. 2003.
9. E. Lefebvre, M. Zaknoune, Y. Cordier, and F. Mollot, "Optimization of buffer layers for InP-metamorphic heterojunction bipolar transistor on GaAs," in Proc. Indium Phosphide Related Materials Conf., 2003, pp. 409-412.
10. 1-xAs/GaAs buffer layers," J. Appl. Phys., vol. 86, no. 9, pp. 4748-4755, 1999.
11. 1-y lattice-matched to InP and GaAs," Cryst. Res. Tech., vol. 17, no. 11, pp. K117-K122, 1982.
12. S. Adachi, "Lattice thermal resistivity of III-V compound alloys," J. Appl. Phys., vol. 54, no. 4, pp. 1844-1848, 1982.
13. H. Wang, G. I. Ng, H. Zheng, H. Yang, Y. Xiong, S. Halder, K. Yuan, C. L. Tan, K. Rahdakrishnan, and S. F. Yoon, "Metamorphic InP-InGaAs heterojunction bipolar transistors on GaAs substrate: DC and microwave performances," IEEE Trans. Electron Devices, vol. 48, pp. 2671-2676, Nov. 2001.
14. M. G. Adlerstein and M. P. Zaitlin, "Thermal resistance measurements for AlGaAs/GaAs heterojunction bipolar transistors," IEEE Trans. Electron Devices, vol. 38, pp. 1553-1554, Oct. 1991.
15. P. M. McIntosh and C. M. Snowden, "Measurement of heterojunction bipolar transistor thermal resistance based on a pulsed I-V system," Electron Lett., vol. 33, no. 1, pp. 100-101, 1997.
16. D. E. Dawson, A. K. Gupta, and M. L. Salib, "CW measurement of HBT thermal resistance," IEEE Trans. Electron Devices, vol. 39, pp. 2235-2239, Dec. 1992.
17. J. R. Waldrop, K. C. Wang, and P. M. Asbeck, "Determination of junction temperature in AlGaAs/GaAs heterojunction bipolar transistors by electrical measurement," IEEE Trans. Electron Devices, vol. 39, pp. 1248-1250, Oct. 1992.
18. W. Liu and A. Yuksel, "Measurement of junction temperature of an AlGaAs/GaAs heterojunction bipolar transistor operating at large power densities," IEEE Trans. Electron Devices, vol. 42, pp. 358-360, Mar. 1995.
19. N. Bovolon, P. Baureis, J.-E. Muller, P. Zwicknagl, R. Schultheis, and E. Zanoni, "A simple method for the thermal resistance measurement of AlGaAs/GaAs heterojunction bipolar transistors," IEEE Trans. Electron Devices, vol. 45, pp. 1846-1848, Oct. 1998.
20. J. Scott, "Reconciliation of methods for bipolar transistor thermal resistance extraction," in Proc. IEEE Int. Symp. Circuits Systems, vol. 3, Sydney, Australia, May 6-9, 2001, pp. 465-468.
21. S. P. Marsh, "Direct extraction technique to derive the junction temperature of HBTs under high self-heating bias conditions," IEEE Trans. Electron Devices, vol. 47, pp. 288-291, Jan. 2001.
22. J. S. Blakemore, "Semiconducting and other major properties of gallium arsenide," J. Appl. Phys., vol. 53, p. R123, 1982.
23. W. Liu, H.-F. Chua, and E. Beam III, "Thermal properties and thermal instabilities of InP-based heterojunction bipolar transistors," IEEE Trans. Electron Devices, vol. 43, pp. 388-395, 1996.
24. R. C. Joy and E. S. Shlig, "Thermal properties of very fast transistors," IEEE Trans. Electron Devices, vol. 17, pp. 596-594, Apr. 1970.
25. D. J. Walkey, D. Celo, and T. J. Smy, "A simplified model for the effect of interfinger metal on maximum temperature rise in a multifinger bipolar transistor," IEEE Trans. Computer-Aided Design, vol. 22, no. 1, pp. 15-25, 2003.
26. J. J. Licari and L. R. Enlow, Hybrid Microcircuit Technology Handbook. Westwood, NJ: Noyes Publications, 1988.
27. J.-S. Rieh, J. Johnson, S. Furkay, D. Greenberg, G. Freeman, and S. Subbanna, "Structural dependence of the thermal resistance of trench-isolated bipolar transistors," in Proc. IEEE BCTM Tech. Dig., 2002, pp. 100-103.
28. W. Nakwaski, "Thermal conductivity of binary, ternary, and quaternary III-V compounds," J. Appl. Phys., vol. 64, no. 1, pp. 159-166, 1988.
29. V. Spagnolo, M. Troccoli, G. Scamarcio, C. Gmachl, F. Capasso, A. Tredicucci, A. M. Sergent, A. L. Hutchinson, D. L. Sivco, and A. Y. Cho, "Temperature profile of GaInAs-AlInAs/InP quantum cascade-laser facets measured by microprobe photoluminescence," Appl. Phys. Lett., vol. 78, no. 15, pp. 2095-2097, 2001.
30. M. Olavsbraten, "A simple practical technique for estimating the junction temperature and the thermal resistance of a GaAs HBT," in Proc. MTT-S, vol. 2, 2002, pp. 1005-1008.
31. I. Harrison, M. Dahlstrom, S. Krishnan, Z. Griffith, Y. M. Kim, and M. J. W. Rodwell, "Thermal limitations of InP HBTs in 80- and 160-Gb ICs," IEEE Trans. Electron Devices, vol. 51, pp. 529-534, Apr. 2004.
32. F. N. Masana, "A closed form solution of junction to substrate thermal resistance in semiconductor chips," IEEE Trans. Comp., Packag., Manufact. Technol. C, pt. A, vol. 19, pp. 539-545, Apr. 1996.