-
1
-
-
0034822555
-
High power LDMOS for cellucar base station applications
-
Osaka, Japan, June 4-7
-
M. Shindo, M. Morikawa, T. Fujioka, K. Nagura, K. Kurotani, K. Odaira, T. Uchiyama, and I. Yoshida, "High power LDMOS for cellucar base station applications," in Proc. Int. Symp. Power Semiconductor Devices ICs, Osaka, Japan, June 4-7, 2001, pp. 107-110.
-
(2001)
Proc. Int. Symp. Power Semiconductor Devices ICs
, pp. 107-110
-
-
Shindo, M.1
Morikawa, M.2
Fujioka, T.3
Nagura, K.4
Kurotani, K.5
Odaira, K.6
Uchiyama, T.7
Yoshida, I.8
-
2
-
-
0015285496
-
D-MOS transistor for micrwave applications
-
Jan
-
H. J. Sigg, G. D. Vendelin, T. P. Cauge, and J. Kocis, "D-MOS transistor for micrwave applications," IEEE Trans. Electron Devices, vol. ED-19, pp. 45-53, Jan. 1972.
-
(1972)
IEEE Trans. Electron Devices
, vol.ED-19
, pp. 45-53
-
-
Sigg, H.J.1
Vendelin, G.D.2
Cauge, T.P.3
Kocis, J.4
-
3
-
-
0033347299
-
High performance scaled down LDMOS with thin gate bird's beak technology for RF power amplifiers
-
Y. Hoshino, M. Morikawa, S. Kamohara, M. Kawakami, T. Fujioka, Y. Matsunaga, Y. Kusakari, S. Ikeda, I. Yoshida, and S. Shimizu, "High performance scaled down LDMOS with thin gate bird's beak technology for RF power amplifiers," in IEDM Tech. Dig., 1999, p. 205.
-
(1999)
IEDM Tech. Dig.
, pp. 205
-
-
Hoshino, Y.1
Morikawa, M.2
Kamohara, S.3
Kawakami, M.4
Fujioka, T.5
Matsunaga, Y.6
Kusakari, Y.7
Ikeda, S.8
Yoshida, I.9
Shimizu, S.10
-
4
-
-
1642634448
-
Nature and location of interface traps in RFLDMOS due to hot carriers
-
T. Nigam, A. Shibib, S. Xu, H. Safar, and L. Steinberg, "Nature and location of interface traps in RFLDMOS due to hot carriers," Microelectron. Eng., vol. 72, no. 1-4, pp. 71-75, 2004.
-
(2004)
Microelectron. Eng.
, vol.72
, Issue.1-4
, pp. 71-75
-
-
Nigam, T.1
Shibib, A.2
Xu, S.3
Safar, H.4
Steinberg, L.5
-
5
-
-
4444350639
-
Novel LDMOS structure for 2 GHz high power base station application
-
Amsterdam, The Netherlands
-
H. F. F. Jos, "Novel LDMOS structure for 2 GHz high power base station application," in Proc. Eur. Microwave Conf., Amsterdam, The Netherlands, 1998, p. 439.
-
(1998)
Proc. Eur. Microwave Conf.
, pp. 439
-
-
Jos, H.F.F.1
-
6
-
-
0029354885
-
Highly efficient 1.5 GHz band Si power MOS amplifier module
-
I. Yoshida and M. Katsueda, "Highly efficient 1.5 GHz band Si power MOS amplifier module," in IEICE Trans. Electron Devices, vol. E78-C, Aug. 1995, pp. 978-982.
-
(1995)
IEICE Trans. Electron Devices
, vol.E78-C
, pp. 978-982
-
-
Yoshida, I.1
Katsueda, M.2
-
7
-
-
84886448165
-
2-GHz Si power MOSFET technology
-
I. Yoshida, "2-GHz Si power MOSFET technology," in IEDM Tech. Dig., 1997, pp. 51-54.
-
(1997)
IEDM Tech. Dig.
, pp. 51-54
-
-
Yoshida, I.1
-
8
-
-
0033306991
-
RF LDMOS with extreme low parasitic feedback capacitance and high hot-carrier immunity
-
S. Xu, P. Foo, J. Wen, Y. Liu, F. Lin, and C. En, "RF LDMOS with extreme low parasitic feedback capacitance and high hot-carrier immunity," in IEDM Tech. Dig., 1999, pp. 201-204.
-
(1999)
IEDM Tech. Dig.
, pp. 201-204
-
-
Xu, S.1
Foo, P.2
Wen, J.3
Liu, Y.4
Lin, F.5
En, C.6
-
9
-
-
0030397063
-
High-performance silicon LDMOS technology for 2 GHz rf power amplifier application
-
A. Wood, C. Dragon, and W. Burger, "High-performance silicon LDMOS technology for 2 GHz rf power amplifier application," in IEDM Tech. Dig., 1996, pp. 87-90.
-
(1996)
IEDM Tech. Dig.
, pp. 87-90
-
-
Wood, A.1
Dragon, C.2
Burger, W.3
-
10
-
-
0022288589
-
A 2.45 GHz power LD-MOSFET with reduced source inductance by V-Groove connections
-
O. Ishikawa-O, H. Yamada, and H. Esaki, "A 2.45 GHz power LD-MOSFET with reduced source inductance by V-Groove connections," in IEDM Tech. Dig., 1985, p. 166.
-
(1985)
IEDM Tech. Dig.
, pp. 166
-
-
Ishikawa-O, O.1
Yamada, H.2
Esaki, H.3
-
11
-
-
0035717648
-
Trenched sinker LDMOSFET (TS-LD-MOSFET) structure for high power amplifier application above 2 GHz
-
C. Kim, J. Park, and H. Yu, "Trenched sinker LDMOSFET (TS-LD-MOSFET) structure for high power amplifier application above 2 GHz," in IEDM Tech. Dig., 2001, pp. 887-890.
-
(2001)
IEDM Tech. Dig.
, pp. 887-890
-
-
Kim, C.1
Park, J.2
Yu, H.3
-
12
-
-
0035279648
-
An SOI LDMOS/CMOS/BJT technology for integrated power amplifiers used in wireless transceiver applications
-
Mar
-
M. Kumar, Y. Tan, J. K. O. Sin, and J. Cai, "An SOI LDMOS/CMOS/BJT technology for integrated power amplifiers used in wireless transceiver applications," IEEE Electron Device Lett., vol. 22, pp. 136-138, Mar. 2001.
-
(2001)
IEEE Electron Device Lett.
, vol.22
, pp. 136-138
-
-
Kumar, M.1
Tan, Y.2
Sin, J.K.O.3
Cai, J.4
-
13
-
-
0035716244
-
A partial SOI technology for single-chip RF power amplifiers
-
J. Cai, C. Ren, Y. Liang, N. Balasubramanian, and J. K. O. Sin, "A partial SOI technology for single-chip RF power amplifiers," in IEDM Tech. Dig., 2001, pp. 891-894.
-
(2001)
IEDM Tech. Dig.
, pp. 891-894
-
-
Cai, J.1
Ren, C.2
Liang, Y.3
Balasubramanian, N.4
Sin, J.K.O.5
-
14
-
-
0035336601
-
A novel high performance stacked LDD RF LDMOSFET
-
May
-
J. Cai, C. Ren, N. Balasubramanian, and J. K. O. Sin, "A novel high performance stacked LDD RF LDMOSFET," IEEE Electron Device Lett., vol. 22, pp. 236-238, May 2001.
-
(2001)
IEEE Electron Device Lett.
, vol.22
, pp. 236-238
-
-
Cai, J.1
Ren, C.2
Balasubramanian, N.3
Sin, J.K.O.4
-
15
-
-
0036541341
-
1 W/mm RF power density at 3.2 GHz for dual-layer RESURF LDMOSFET transistor
-
Apr
-
J. Olsson, N. Rorsman, L. Vestling, C. Fager, J. Ankarcrona, H. Zirath, and K. Eklund, "1 W/mm RF power density at 3.2 GHz for dual-layer RESURF LDMOSFET transistor," IEEE Electron Device Lett., vol. 23, pp. 206-208, Apr. 2002.
-
(2002)
IEEE Electron Device Lett.
, vol.23
, pp. 206-208
-
-
Olsson, J.1
Rorsman, N.2
Vestling, L.3
Fager, C.4
Ankarcrona, J.5
Zirath, H.6
Eklund, K.7
-
17
-
-
0018714042
-
High-voltage thin layer devices (RESURF devices)
-
J. A. Appels and H. M. J. Vaes, "High-voltage thin layer devices (RESURF devices)," in IEDM Tech. Dig., 1979, pp. 238-240.
-
(1979)
IEDM Tech. Dig.
, pp. 238-240
-
-
Appels, J.A.1
Vaes, H.M.J.2
-
19
-
-
0033169514
-
Performance modeling of RF power MOSFET's
-
Aug
-
M. Trivedi, P. Khandelwal, and K. Shenai, "Performance modeling of RF power MOSFET's," IEEE Trans. Electron Devices, vol. 46, pp. 1794-1802, Aug. 1999.
-
(1999)
IEEE Trans. Electron Devices
, vol.46
, pp. 1794-1802
-
-
Trivedi, M.1
Khandelwal, P.2
Shenai, K.3
-
20
-
-
0020208332
-
Correlation between substrate and gate currents in MOSFET's
-
Nov
-
S. Tam, P. Ko, C. Hu, and R. S. Muller, "Correlation between substrate and gate currents in MOSFET's," IEEE Trans. Electron Devices, vol. ED-29, pp. 1740-1744, Nov. 1982.
-
(1982)
IEEE Trans. Electron Devices
, vol.ED-29
, pp. 1740-1744
-
-
Tam, S.1
Ko, P.2
Hu, C.3
Muller, R.S.4
-
21
-
-
84945713471
-
Hot-electron-induced MOSFET degradation - Model, monitor, and improvement
-
Feb
-
C. Hu, S. C. Tam, F. Hsu, P. Ko, T. Chan, and K. W. Terrill, "Hot-electron-induced MOSFET degradation - Model, monitor, and improvement," IEEE Trans. Electron Devices, vol. ED-32, pp. 375-384, Feb. 1985.
-
(1985)
IEEE Trans. Electron Devices
, vol.ED-32
, pp. 375-384
-
-
Hu, C.1
Tam, S.C.2
Hsu, F.3
Ko, P.4
Chan, T.5
Terrill, K.W.6
-
22
-
-
84900319972
-
Progress in silicon RF power MOS technologies-current and future trends
-
M. M. De Souza, G. Cao, S. E. M. Narayanan, F. Youming, S. K. Manhas, J. Luo, and N. Moguilnaia, "Progress in silicon RF power MOS technologies-current and future trends," in Proc. ICCDCS, 2002.
-
(2002)
Proc. ICCDCS
-
-
De Souza, M.M.1
Cao, G.2
Narayanan, S.E.M.3
Youming, F.4
Manhas, S.K.5
Luo, J.6
Moguilnaia, N.7
-
23
-
-
0027201356
-
Analysis of the quasisaturation behavior considering the drain-to-source and cell-spacing effects for a vertical DMOS power transistor
-
Jan
-
K. H. Lou, C. M. Liu, and J. B. Kuo, "Analysis of the quasisaturation behavior considering the drain-to-source and cell-spacing effects for a vertical DMOS power transistor," Solid State Electron., vol. 36, pp. 85-91, Jan. 1993.
-
(1993)
Solid State Electron.
, vol.36
, pp. 85-91
-
-
Lou, K.H.1
Liu, C.M.2
Kuo, J.B.3
-
24
-
-
0030688695
-
Analysis of hot-carrier-induced degradation and snapback in 50 V lateral MOS transistors
-
A. W. Ludikhuize, M. Slotboom, A. Nezar, N. Nowlin, and R. Brock, "Analysis of hot-carrier-induced degradation and snapback in 50 V lateral MOS transistors," in IEDM Tech. Dig., 1997, pp. 53-56.
-
(1997)
IEDM Tech. Dig.
, pp. 53-56
-
-
Ludikhuize, A.W.1
Slotboom, M.2
Nezar, A.3
Nowlin, N.4
Brock, R.5
-
25
-
-
0032665190
-
Experimental study of hot carrier effects in LDMOS transistors
-
June
-
R. Versari and A. Pieracci, "Experimental study of hot carrier effects in LDMOS transistors," IEEE Trans. Electron Devices, vol. 46, pp. 1228-1233, June 1999.
-
(1999)
IEEE Trans. Electron Devices
, vol.46
, pp. 1228-1233
-
-
Versari, R.1
Pieracci, A.2
-
26
-
-
0021425363
-
Evaluation of LDD MOSFET's based on hot-electron induced degradation
-
F. C. Hsu and K. Y. Chiu, "Evaluation of LDD MOSFET's based on hot-electron induced degradation," IEEE Electron Device Lett., vol. EDL-5, p. 162, 1984.
-
(1984)
IEEE Electron Device Lett.
, vol.EDL-5
, pp. 162
-
-
Hsu, F.C.1
Chiu, K.Y.2
|