An SOI LDMOS/CMOS/BJT technology for integrated power amplifiers used in wireless transceiver applications

IEEE Electron Device Letters

Volumn 22, Issue 3, 2001, Pages 136-138

  Kumar, Mahender ^a,b   Tan, Yue ^a,b   Sin, Johnny K O ^a,b   Cai, Jun ^c  

^a IEEE   (Hong Kong)

^b HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

^c INSTITUTE OF MICROELECTRONICS   (Singapore)

Author keywords

Inductor; Lateral BJT; LDMOS; Power amplifier; SOI; Wireless transceiver

Indexed keywords

LATERAL BIPOLAR JUNCTION TRANSISTORS; LATERAL DOUBLE DIFFUSED MOS TRANSISTORS; WIRELESS TRANSCEIVER;

BIPOLAR TRANSISTORS; CHANNEL CAPACITY; CMOS INTEGRATED CIRCUITS; ELECTRIC BREAKDOWN; ELECTRIC INDUCTORS; MOSFET DEVICES; SEMICONDUCTOR DEVICE MODELS; SILICON ON INSULATOR TECHNOLOGY; THRESHOLD VOLTAGE; TRANSCEIVERS; WIRELESS TELECOMMUNICATION SYSTEMS;

POWER AMPLIFIERS;

EID: 0035279648     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.910621     Document Type: Article

References (6)

1. Integrated circuit technology options for RFIC's-Present status and future directions
2. 2-GHz Si power MOSFET technology
3. High performance silicon LDMOS technology for 2 GHz RF power amplifier applications
4. High efficiency 0.4 μm gate LDMOS power FET for low voltage wireless communications
5. A LDMOS technology compatible with CMOS and passive components for integrated RF power amplifiers
6. IC compatible planar inductors on silicon