Low-cost protection for ser upsets and silicon defects

Proceedings -Design, Automation and Test in Europe, DATE

Volumn , Issue , 2007, Pages 1146-1151

  Mehrara, Mojtaba ^a   Attariyan, Mona ^a   Bertacco, Valeria ^a   Shyam, Smitha ^a   Austin, Todd ^a   Constantinides, Kypros ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COST REDUCTION; DEFECTS; FAILURE ANALYSIS; FAULT TOLERANCE; MICROPROCESSOR CHIPS; RELIABILITY THEORY; SILICON;

LOW-COST PROTECTION; MANUFACTURING DEFECTS; PROTECTION COSTS; SOFT ERRORS;

TRANSISTORS;

EID: 34548348685     PISSN: 15301591     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2007.364449     Document Type: Conference Paper

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