Cost-efficient soft error protection for embedded microprocessors

CASES 2006: International Conference on Compilers, Architecture and Synthesis for Embedded Systems

Volumn , Issue , 2006, Pages 421-431

  Blome, Jason A ^a   Gupta, Shantanu ^a   Feng, Shuguang ^a   Mahlke, Scott ^a   Bradley, Daryl ^b  

^a UNIVERSITY OF MICHIGAN   (United States)

^b ARM LTD   (United Kingdom)

Author keywords

Embedded processors; Reliability; Soft errors

Indexed keywords

ERROR CORRECTING CODES; FAULT COVERAGE; SOFT ERROR PROTECTION;

COST EFFECTIVENESS; EMBEDDED SYSTEMS; MICROPROCESSOR CHIPS; REDUNDANCY; STATISTICAL METHODS;

ERROR DETECTION;

EID: 34547178825     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1176760.1176811     Document Type: Conference Paper

References (19)

1. ARM Ltd. ARM926EJ-S Technical Reference Manual, Jan. 2004. http://www.arm.com/pdfs/DDI0198D_926_TRM.pdf.
2. T. Austin, D. Blaauw, T. Mudge, and K. Flautner. Making typical silicon matter with razor. IEEE Computer, 37(3):57-65, Mar. 2004.
3. T. Austin, E. Larson, and D. Ernst. Simplescalar: An infrastructure for computer system modeling. IEEE Transactions on Computers, 35(2):59-67, Feb. 2002.
4. D. Bernick, B. Bruckert, P. D. Vigna, D. Garcia, R. Jardine, J. Klecka, and J. Smullen. Nonstop Advanced Architecture. In International Conference on Dependable Systems and Networks, pages 12-21, June 2005.
5. S. Das, D. Roberts, S. Lee, S. Pant, D. Blaauw, T. Austin, K. Flautner, and T. Mudge. A self-tuning dvs processor using delay-error detection and correction. IEEE Journal of Solid-State Circuits, 41(4):792-804, 2006.
6. P. Franco and E. J. McCluskey. On-line delay testing of digital circuits. In Proc. of the 1994 IEEE VLSI Test Symposium, pages 167-173, 1994.
7. M. Y. Hsiao. A class of optimal minimum odd-weight-column sec-ded codes. IBM Journal of Research and Development, 14(4):395-401, 1970.
8. S. Kim and A. Somani. Soft error sensitivity characterization for microprocessor dependability enhancement strategy. In International Conference on Dependable Systems and Networks, pages 416-428, June 2002.
9. C. Lee, M. Potkonjak, and W. Mangione-Smith. MediaBench: A tool for evaluating and synthesizing multimedia and communications systems. In Proc. of the 30th Annual International Symposium on Microarchitecture, pages 330-335, 1997.
10. G. Memik, M. Chowdhury, A. Mallik, and Y. Ismail. Engineering over-clocking: Reliability-performance trade-offs for high-performance register files. In International Conference on Dependable Systems and Networks, pages 770-779, June 2005.
11. S. S. Mukherjee, C. Weaver, J. Emer, S. Reinhardt, and T. Austin. A systematic methodology to compute the architectural vulnerability factors for a high performance microprocessor. In International Symposium on Microarchitecture, pages 29-42, Dec. 2003.
12. M. Nicolaidis. Time redundancy based soft-error tolerance to rescue nanometer technologies. In Proc. of the 1999 IEEE VLSI Test Symposium, pages 86-94, 1999.
13. S. K. Reinhardt and S. S. Mukherjee. Transient fault detection via simulataneous multithreading. In Proc. of the 27th Annual International Symposium on Computer Architecture, pages 25-36, June 2000.
14. E. Rotenberg. AR-SMT: A microarchitectural approach to fault tolerance in microprocessors. In International Symposium on Fault Tolerant Computing, pages 84-91, 1999.
15. G. P. Saggese, A. Vetteth, Z. Kalbarczyk, and R. Iyer. Microprocessor sensitivity to failures: Control vs. execution and combinatorial vs. sequential logic. In International Conference on Dependable Systems and Networks, pages 760-769, June 2005.
16. D. Seal. ARM Architecture Reference Manual. Addison-Wesley, London, UK, 2000.
17. L. Spainhower and T. Gregg. IBM S/390 Parallel Enterprise Server G5 Fault Tolerance: A Historical Perspective. IBM Journal of Research and Development, 43(6):863-873, 1999.
18. N. J. Wang, J. Quek, T. M. Rafacz, and S. J. Patel. Characterizing the Effects of Transient Faults on a High-Performance Processor Pipeline. In International Conference on Dependable Systems and Networks, page 61, June 2004.
19. J. Zeigler. Terrestrial cosmic ray intensities. IBM Journal of Research and Development, 42(1):117-139, 1998.