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Volumn , Issue , 2005, Pages 770-779

Engineering over-clocking: Reliability-performance trade-offs for high-performance register files

Author keywords

Adaptive Systems; Fault Tolerant Computing; Reliability

Indexed keywords

ENGINEERING OVER-LOCKING; REGISTER FILES; RELIABILITY-PERFORMANCE TRADE-OFFS; SUPERSCALAR PROCESSORS;

EID: 27544478318     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DSN.2005.43     Document Type: Conference Paper
Times cited : (21)

References (28)
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    • Razor: A low-power pipeline based on circuit-level timing speculation
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    • Ernst, D., et al. Razor: A Low-Power Pipeline Based on Circuit-Level Timing Speculation. in International Symposium on Microarchitecture. Dec. 2003.
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    • Hamming, R.W.1
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    • Kessler, R., The Alpha 21264 Microprocessor. IEEE Micro, Mar/Apr 1999. 19(2).
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    • Kessler, R.1
  • 13
    • 4544387534 scopus 로고    scopus 로고
    • An Architectural framework for providing reliability and security support
    • June Florence, Italy
    • Nakka N., et al. An Architectural Framework for Providing Reliability and Security Support. in International Conf. on Dependable Systems and Networks (DSN). June 2004. Florence, Italy.
    • (2004) International Conf. on Dependable Systems and Networks (DSN)
    • Nakka, N.1
  • 14
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    • Deterministic software-based self-testing of embedded processor core
    • March
    • Paschalis, A., et al. Deterministic Software-Based Self-Testing of Embedded Processor Core. in Design Automation and Test in Europe (DATE). March 2001.
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    • Paschalis, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.