Fabrication and characterization of fine pitch on-chip copper interconnects for advanced wafer level packaging by a high aspect ratio through AZ9260 resist electroplating

Journal of Micromechanics and Microengineering

Volumn 17, Issue 5, 2007, Pages 1078-1086

  Dixit, Pradeep ^a   Tan, Chee Wee ^a   Xu, Luhua ^a   Lin, Nay ^a   Miao, Jianmin ^a   Pang, John H L ^a   Backus, Petra ^b   Preisser, Robert ^b  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b ATOTECH DEUTSCHLAND GMBH   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ASPECT RATIO; COATINGS; ELECTRONICS PACKAGING; ELECTROPLATING; LITHOGRAPHY; OPTICAL INTERCONNECTS; PHOTORESISTORS; SPIN COATING; TRANSMISSION ELECTRON MICROSCOPY;

ADVANCED PACKAGING APPLICATIONS; COPPER INTERCONNECTS; FEATURE SIZES; LOW RESISTIVE INTERCONNECTS;

SILICON WAFERS;

EID: 34247486505     PISSN: 09601317     EISSN: 13616439     Source Type: Journal    
DOI: 10.1088/0960-1317/17/5/030     Document Type: Article

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