Effect of gate overlap and source/drain doping gradient on 10-nm CMOS performance

IEEE Transactions on Electron Devices

Volumn 53, Issue 12, 2006, Pages 3146-3149

  Liu, Minjian ^a   Cai, Ming ^a   Yu, Bo ^a   Taur, Yuan ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

CMOS; Overlap; Source drain (S D) lateral gradient (LG); Underlap

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; DIGITAL CIRCUITS; ELECTRIC RESISTANCE;

GATE OVERLAP; SOURCE/DRAIN (S/D) LATERAL GRADIENT (LG); SWITCHING PERFORMANCE;

GATES (TRANSISTOR);

EID: 33947225708     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2006.885103     Document Type: Review

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