DC and AC characteristics of sub-50-nm MOSFETs with source/drain-to-gate nonoverlapped structure

IEEE Transactions on Nanotechnology

Volumn 1, Issue 4, 2002, Pages 219-224

  Lee, Hyunjin ^b   Lee, Jongho ^a,c   Shin, Hyungcheol ^a,b  

^a Korea Advanced Institute of Science and Technology ^*

^b Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

^c Kyungpook National University   (South Korea)

Author keywords

Cutoff frequency; MOSFETs; Propagation delay time; Scaling

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC FIELDS; ELECTRIC PROPERTIES; ELECTRONS; METALLURGY;

CUTOFF FREQUENCY; PROPAGATION DELAY TIME; SCALING;

MOSFET DEVICES;

EID: 0842342302     PISSN: 1536125X     EISSN: None     Source Type: Journal    
DOI: 10.1109/TNANO.2002.807376     Document Type: Conference Paper

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