Interface layers for high-k/Ge gate stacks: Are they necessary?

ECS Transactions

Volumn 3, Issue 7, 2006, Pages 519-530

  McIntyre, P C ^a   Chi, D ^a   Chui, C O ^a   Kim, H ^b   Seo, K I ^a   Saraswat, K C ^a   Sreenivasan, R ^a   Sugawara, T ^a   Aguirre Testado, F S ^c   Wallace, R M ^c  

^a Stanford University   (United States)

^b Sungkyunkwan University   (South Korea)

^c The University of Texas at Dallas   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC INSULATORS; ELECTRIC VARIABLES MEASUREMENT; ELECTRON TRAPS; GATES (TRANSISTOR); MOS DEVICES; PERMITTIVITY; SEMICONDUCTING GERMANIUM COMPOUNDS;

FREQUENCY DISPERSION; GATE STACKS; GERMANIUM OXYNITRIDE; INTERFACE LAYERS; PERMITTIVITY DIFFUSION BARRIER;

INTERFACES (MATERIALS);

EID: 33846943704     PISSN: 19385862     EISSN: 19386737     Source Type: Conference Proceeding    
DOI: 10.1149/1.2355849     Document Type: Conference Paper

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