Integrating physical constraints in HW-SW partitioning for architectures with partial dynamic reconfiguration

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 14, Issue 11, 2006, Pages 1189-1202

  Banerjee, Sudarshan ^a,b   Bozorgzadeh, Elaheh ^a,b   Dutt, Nikil D ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Hardware software (HW SW) partitioning; Linear placement; Partial dynamic reconfiguration

Indexed keywords

HARDWARE SOFTWARE (HW-SW) PARTITIONING; INTEGER LINEAR PROGRAMMING (ILP); LINEAR PLACEMENTS; PARTIAL DYNAMIC RECONFIGURATION;

COMPUTER ARCHITECTURE; COMPUTER HARDWARE; COMPUTER SOFTWARE; GRAPH THEORY; HEURISTIC METHODS; INTEGER PROGRAMMING; LINEAR PROGRAMMING;

CONSTRAINT THEORY;

EID: 33845527396     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2006.886411     Document Type: Article

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