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Volumn 1, Issue , 2005, Pages 298-301

A system-level approach to hardware reconfigurable systems

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER HARDWARE; EMBEDDED SYSTEMS; STRUCTURAL DESIGN;

EID: 84861440285     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1120725.1120853     Document Type: Conference Paper
Times cited : (11)

References (9)
  • 2
    • 35248851504 scopus 로고    scopus 로고
    • PISA - A platform and programming language independent interface for search algorithms
    • S. Bleuler, M. Laumanns, L. Thiele, and E. Zitsler. PISA - A Platform and Programming Language Independent Interface for Search Algorithms. In Proc. of EMO'03, pages 494-508, 2003.
    • (2003) Proc. of EMO'03 , pp. 494-508
    • Bleuler, S.1    Laumanns, M.2    Thiele, L.3    Zitsler, E.4
  • 3
    • 0031704808 scopus 로고    scopus 로고
    • System-level synthesis using evolutionary algorithms
    • R. Gupta, editor. Kluwer, Jan
    • T. Blickle, J. Teich, and L. Thiele. System-Level Synthesis Using Evolutionary Algorithms. In R. Gupta, editor, Design Automation for Embedded Systems, 3, pages 23-62. Kluwer, Jan. 1998.
    • (1998) Design Automation for Embedded Systems , vol.3 , pp. 23-62
    • Blickle, T.1    Teich, J.2    Thiele, L.3
  • 6
    • 0032308182 scopus 로고    scopus 로고
    • CORDS: Hardware-software co-synthesis of reconfigurable real-time distributed embedded systems
    • R. P. Dick and N. K. Jha. CORDS: Hardware-Software Co-Synthesis of Reconfigurable Real-Time Distributed Embedded Systems. In Proc. of the Int. Conf. on CAD. pages 62-67, 1998.
    • (1998) Proc. of the Int. Conf. on CAD , pp. 62-67
    • Dick, R.P.1    Jha, N.K.2
  • 7
    • 33646931958 scopus 로고    scopus 로고
    • ReCoNet: Modeling and implementation of fault tolerant distributed reconfigurable hardware
    • Sao Paulo, Brazil
    • C Haubelt, D. Koch, and J. Teich. ReCoNet: Modeling and Implementation of Fault Tolerant Distributed Reconfigurable Hardware. In Proc. of SBCCI'2003, pages 343-348, Sao Paulo, Brazil, 2003.
    • (2003) Proc. of SBCCI'2003 , pp. 343-348
    • Haubelt, C.1    Koch, D.2    Teich, J.3
  • 8
    • 30544447141 scopus 로고    scopus 로고
    • A hardware-software partitioning and scheduling algorithm for dynamically reconfigurable embedded systems
    • B. Mei, P. Schaumont, and S. Vemalde. A Hardware-Software Partitioning and Scheduling Algorithm for Dynamically Reconfigurable Embedded Systems. In Proc. of ProRISC 2000, 2000.
    • (2000) Proc. of ProRISC 2000
    • Mei, B.1    Schaumont, P.2    Vemalde, S.3
  • 9
    • 0005231254 scopus 로고    scopus 로고
    • An integrated partitioning and synthesis system for dynamically reconfigurable multi FPGA architectures
    • I. Quaiss, S. Govindarajan, V. Snnivasan, M. Kaul, and R. Vemuri. An Integrated Partitioning and Synthesis System for Dynamically Reconfigurable Multi FPGA Architectures. In Proc. of RAW'98, pp.31-36, 1998.
    • (1998) Proc. of RAW'98 , pp. 31-36
    • Quaiss, I.1    Govindarajan, S.2    Snnivasan, V.3    Kaul, M.4    Vemuri, R.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.