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Volumn , Issue , 2005, Pages 335-340

Physically-aware HW-SW partitioning for reconfigurable architectures with partial dynamic reconfiguration

Author keywords

HW SW partitioning; Linear placement; Partial dynamic reconfiguration

Indexed keywords

COMPUTER SOFTWARE; CONSTRAINT THEORY; GRAPH THEORY; HEURISTIC METHODS; OPTIMAL SYSTEMS; RESOURCE ALLOCATION; SCHEDULING;

EID: 27944438054     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/dac.2005.193828     Document Type: Conference Paper
Times cited : (91)

References (17)
  • 2
    • 33845535510 scopus 로고    scopus 로고
    • Optimal reconfiguration sequence management
    • S. Ghiasi, M. Sarrafzadeh, "Optimal Reconfiguration Sequence Management", ASPDAC, 2003.
    • (2003) ASPDAC
    • Ghiasi, S.1    Sarrafzadeh, M.2
  • 4
    • 0347117076 scopus 로고    scopus 로고
    • Optimal FPGA module placement with temporal precedence constraints
    • S.P. Fekete, E.Kohler, J.Teich, "Optimal FPGA module placement with temporal precedence constraints", DATE, 2001
    • (2001) DATE
    • Fekete, S.P.1    Kohler, E.2    Teich, J.3
  • 7
    • 12344322543 scopus 로고    scopus 로고
    • Hardware-software cosynthesis for run-time incrementally reconfigurable FPGAs
    • B. Jeong, S. Yoo, S. Lee, K. Choi, "Hardware-Software Cosynthesis for Run-time Incrementally Reconfigurable FPGAs", ASPDAC, 2000.
    • (2000) ASPDAC
    • Jeong, B.1    Yoo, S.2    Lee, S.3    Choi, K.4
  • 8
    • 0034248162 scopus 로고    scopus 로고
    • An iterative algorithm for hardware-software partitioning. Hardware design space exploration, and scheduling
    • K. S. Chatha, R. Vemuri, "An iterative algorithm for Hardware-Software partitioning. Hardware design Space Exploration, and scheduling", Jrnl Design Automation for Embedded Systems, V-5, 2000
    • (2000) Jrnl Design Automation for Embedded Systems , vol.5
    • Chatha, K.S.1    Vemuri, R.2
  • 9
    • 0031643963 scopus 로고    scopus 로고
    • Configuration pre-fetch for single context reconfigurable processors
    • S. Hauck, "Configuration pre-fetch for single context reconfigurable processors", FPGA, 1998.
    • (1998) FPGA
    • Hauck, S.1
  • 11
    • 0031099473 scopus 로고    scopus 로고
    • Extending the Kernighan-Lin heuristic for hardware and software functional partitioning
    • F. Vahid, T. D. Le, "Extending the Kernighan-Lin heuristic for Hardware and Software functional partitioning", Jrnl Design Automation for Embedded Systems, V-2, 1997
    • (1997) Jrnl Design Automation for Embedded Systems , vol.2
    • Vahid, F.1    Le, T.D.2
  • 14
    • 85046457769 scopus 로고
    • A Linear-time heuristic for improving network partitions
    • C. M. Fiduccia, R. M. Mattheyes, "A Linear-time heuristic for improving network partitions", DAC, 1982
    • (1982) DAC
    • Fiduccia, C.M.1    Mattheyes, R.M.2
  • 15
  • 16
    • 27944480980 scopus 로고    scopus 로고
    • HW-SW partitioning for architectures with partial dynamic reconfiguration
    • UC Irvine
    • S Banerjee, E Bozorgzadeh, N Dutt, "HW-SW partitioning for architectures with partial dynamic reconfiguration". Technical Report CECS TR-05-02, UC Irvine.
    • Technical Report , vol.CECS TR-05-02
    • Banerjee, S.1    Bozorgzadeh, E.2    Dutt, N.3
  • 17
    • 27944455769 scopus 로고    scopus 로고
    • www.xilinx.com


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.