Measures to improve delay fault testing on low-cost testers - A case study

Proceedings of the IEEE VLSI Test Symposium

Volumn , Issue , 2005, Pages 223-228

  Beck, Matthias ^a   Barondeau, Olivier ^a   Poehl, Frank ^a   Lin, Xijiang ^b   Press, Ron ^b  

^a INFINEON TECHNOLOGIES AG   (Germany)

^b MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AT-SPEED TEST; AT-SPEED TESTING; CLOCK GENERATOR; DELAY TESTS; DELAY-FAULT TESTING; FAULT COVERAGES; LOW COSTS; TEST GENERATIONS;

ELECTRIC CLOCKS; INTEGRATED CIRCUIT TESTING;

DESIGN FOR TESTABILITY;

EID: 33751084739     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTS.2005.54     Document Type: Conference Paper

References (20)

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