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Volumn , Issue , 2005, Pages 196-201

Mapping embedded systems onto NoCs - The traffic effect on dynamic energy estimation

Author keywords

Application mapping; Energy estimation; Networks on chip; Traffic effect

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BIOLOGICAL MATERIALS; COMPUTER PROGRAMMING LANGUAGES; CONFORMAL MAPPING; ELECTRIC LOAD FORECASTING; ELECTRIC NETWORK TOPOLOGY; ENERGY CONSERVATION; ENERGY POLICY; ESTIMATION; EXPERIMENTS; INTEGRATED CIRCUITS; INTERNET; MICROPROCESSOR CHIPS; MOBILE TELECOMMUNICATION SYSTEMS; PHOTOACOUSTIC EFFECT; SYSTEMS ANALYSIS;

EID: 33750090483     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SBCCI.2005.4286856     Document Type: Conference Paper
Times cited : (17)

References (16)
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    • Iyer, A.1    Marculescu, D.2
  • 2
    • 0034848112 scopus 로고    scopus 로고
    • Route packets, not wires: On-chip interconnection networks
    • DAC, pp, June
    • W. Dally and B. Towles. Route packets, not wires: on-chip interconnection networks. Design Automation Conference (DAC), pp. 684-689, June 2001.
    • (2001) Design Automation Conference , pp. 684-689
    • Dally, W.1    Towles, B.2
  • 7
    • 0036053347 scopus 로고    scopus 로고
    • Analysis of power consumption on switch fabrics in network routers
    • DAC, pp, June
    • T. Ye; L. Benini and G. De Micheli. Analysis of power consumption on switch fabrics in network routers. Design Automation Conference (DAC), pp.524-529, June 2002.
    • (2002) Design Automation Conference , pp. 524-529
    • Ye, T.1    Benini, L.2    De Micheli, G.3
  • 9
    • 1242309793 scopus 로고    scopus 로고
    • T. Ye; L. Benini and G. De Micheli. Packetization and routing analysis of on-chip multiprocessor networks. Journal of Systems Architecture (JSA), 50, issues 2-3, pp. 81-104, February 2004.
    • T. Ye; L. Benini and G. De Micheli. Packetization and routing analysis of on-chip multiprocessor networks. Journal of Systems Architecture (JSA), vol. 50, issues 2-3, pp. 81-104, February 2004.
  • 10
    • 33645002018 scopus 로고    scopus 로고
    • A Technology-aware and Energy-oriented Topology Exploration for On-chip Networks
    • March
    • H. Wang; L. Peh; S. Malik. A Technology-aware and Energy-oriented Topology Exploration for On-chip Networks. Design, Automation and Test in Europe (DATE), pp. 1238-1243, March 2005.
    • (2005) Design, Automation and Test in Europe (DATE) , pp. 1238-1243
    • Wang, H.1    Peh, L.2    Malik, S.3
  • 12
    • 9544237156 scopus 로고    scopus 로고
    • HERMES: An infrastructure for low area overhead packetswitching networks on chip
    • October
    • F. Moraes, N. Calazans, A. Mello, L. Möller and L. Ost. HERMES: an infrastructure for low area overhead packetswitching networks on chip. The VLSI Journal Integration (VJI), vol. 38, issue 1, pp. 69-93, October 2004.
    • (2004) The VLSI Journal Integration (VJI) , vol.38 , Issue.1 , pp. 69-93
    • Moraes, F.1    Calazans, N.2    Mello, A.3    Möller, L.4    Ost, L.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.