New framework for static timing analysis, incremental timing refinement, and timing simulation

Proceedings of the Asian Test Symposium

Volumn , Issue , 2000, Pages 102-107

  Chen, Liang Chi ^a   Gupta, Sandeep K ^a   Breuer, Melvin A ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INCREMENTAL TIMING REFINEMENT (ITR); STATIC TIMING ANALYSIS;

COMPUTER AIDED NETWORK ANALYSIS; COMPUTER SIMULATION; ELECTRIC NETWORK SYNTHESIS;

INTEGRATED CIRCUITS;

EID: 0034507816     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

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9. L. C. Chen, S. K. Gupta, and M. A. Breuer, "Incremental timing refinement on a min-max delay model", Computer Engineer technical report No. 00-01, Electrical Engineer - System Dept., University of Southern California, April 2000.
10. W. Y. Chen, "Test generation for crosstalk noise in VLSI circuits", Ph.D. dissertation, University of Southern California, EE-System Dept., 2000.