Hardware architecture design of an H.264/AVC video codec

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn 2006, Issue , 2006, Pages 750-757

  Chen, Tung Chien ^a   Lian Jr , Chung ^a   Chen, Liang Gee ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; COMPUTER HARDWARE; MOTION COMPENSATION; MOTION ESTIMATION; OPTIMIZATION; PROBLEM SOLVING; STANDARDS;

DATA REUSED SCHEMES; LOW BANDWIDTH PARALLEL INTEGER MOTION ESTIMATION; MOTION COMPENSATION ENGINES; VIDEO CODING STANDARDS;

IMAGE CODING;

EID: 33748596840     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1118299.1118473     Document Type: Conference Paper

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