Variable block size motion estimation algorithm and its hardware architecture for H.264/AVC

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 3, Issue , 2004, Pages

  Lee, Jae Hun ^a   Lee, Nam Suk ^a  

^a SAMSUNG Electronics   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BLOCK CODES; FREQUENCIES; HARDWARE; REAL TIME SYSTEMS; VECTORS;

BLOCK SIZE; MEDIAN FILTERING; OPERATING FREQUENCY; REAL-TIME PROCESSING;

MOTION ESTIMATION;

EID: 4344604315     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. T. Wiegand, G. J. Sullivan, G. BjØntegaard, and A. Luthra, "Overview of the H.264/AVC Video Coding Standard," IEEE Trans. Circuits Syst. Video Technol., vol. 13, no. 7, pp. 560-576, July 2003.
2. J. H. Lee, K. W. Lim, B. C. Song, and J. B. Ra, "A fast multi-resolution block matching algorithm and its LSI architecture for low bit-rate video coding," IEEE Trans. Circuits Syst. Video Technol., vol. 11, no. 12, pp. 1289-1301, Dec. 2001.
3. Joint Video Team (JVT) software JM6.1e