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Volumn 2005, Issue , 2005, Pages 271-274
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Dual-block-pipelined VLSI architecture of entropy coding for H.264/AVC baseline profile
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER SIMULATION;
ENCAPSULATION;
ENTROPY;
PROGRAM TRANSLATORS;
REAL TIME SYSTEMS;
SCANNING;
VLSI CIRCUITS;
CODING ENGINE;
CONTEXT-BASED ADAPTIVE VARIABLE LENGTH CODING (CAVLC);
DUAL-BLOCK-PIPELINED ARCHITECTURE;
NETWORK ABSTRACTION LAYERS;
SIGNAL ENCODING;
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EID: 33745434453
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/VDAT.2005.1500073 Document Type: Conference Paper |
Times cited : (33)
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References (6)
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