Low-power VLSI design for motion estimation using adaptive pixel truncation

IEEE Transactions on Circuits and Systems for Video Technology

Volumn 10, Issue 5, 2000, Pages 669-678

  He, Zhong Li ^b   Tsui, Chi Ying ^a,c   Chan, Kai Keung ^d   Liou, Ming L ^a,c  

^a IEEE

^b MOTOROLA INC   (United States)

^c HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

^d DataPath Systems Inc   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIT ERROR RATE; ENERGY UTILIZATION; IMAGE CODING; IMAGE QUALITY; INTEGRATED CIRCUIT LAYOUT;

ADAPTIVE PIXEL TRUNCATION; MOTION ESTIMATION;

VLSI CIRCUITS;

EID: 0034250641     PISSN: 10518215     EISSN: None     Source Type: Journal    
DOI: 10.1109/76.856445     Document Type: Article

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