Area and delay estimation for FPGA implementation of coarse-grained reconfigurable architectures

Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)

Volumn 2006, Issue , 2006, Pages 182-188

  Yan, Leipo ^a   Srikanthan, Thambipillai ^a   Gang, Niu ^a  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

Author keywords

Area estimation; CGRA; Delay estimation; Hardware software partitioning; VLIW

Indexed keywords

COMPUTER HARDWARE; COMPUTER SOFTWARE; EMBEDDED SYSTEMS; ERROR ANALYSIS; FIELD PROGRAMMABLE GATE ARRAYS; GRAPH THEORY;

AREA ESTIMATION; DELAY ESTIMATION; HARDWARE AREA CONSUMPTION; HARDWARE/SOFTWARE PARTITIONING;

COMPUTER ARCHITECTURE;

EID: 33746055698     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1134650.1134677     Document Type: Conference Paper

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