The Design of Dynamically Reconfigurable Datapath Coprocessors

ACM Transactions on Embedded Computing Systems

Volumn 3, Issue 2, 2004, Pages 361-384

  Huang, Zhining ^a   Malik, Sharad ^a   Moreano, Nahri ^b   Araujo, Guido ^b  

^a Princeton University   (United States)

^b UNIVERSITY OF CAMPINAS   (Brazil)

Author keywords

Algorithm; coarse grain reconfigurable fabric; datapath synthesis; Design; interconnection design; Loop pipelining; Performance; reconfigurable datapath

Indexed keywords

EID: 85008021361     PISSN: 15399087     EISSN: 15583465     Source Type: Journal    
DOI: 10.1145/993396.993403     Document Type: Article

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