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Volumn 788, Issue , 2005, Pages 386-393

Issues in line edge and linewidth roughness metrology

Author keywords

Line edge roughness (LER); Linewidth roughness (LWR); Measurement algorithms; Measurement bias

Indexed keywords


EID: 33745600950     PISSN: 0094243X     EISSN: 15517616     Source Type: Conference Proceeding    
DOI: 10.1063/1.2062992     Document Type: Conference Paper
Times cited : (16)

References (15)
  • 1
    • 0141608680 scopus 로고    scopus 로고
    • Characterization of line-edge roughness in resist patterns and estimation of its effect on device performance
    • A. Yamaguchi, R. Tsuchiya, H. Fukuda, O. Komuro, H. Kawada, and T. Iizumi, "Characterization of Line-Edge Roughness in Resist Patterns and Estimation of its Effect on Device Performance," Proc. SPIE 5038, 689-698 (2003).
    • (2003) Proc. SPIE , vol.5038 , pp. 689-698
    • Yamaguchi, A.1    Tsuchiya, R.2    Fukuda, H.3    Komuro, O.4    Kawada, H.5    Iizumi, T.6
  • 2
    • 0035364688 scopus 로고    scopus 로고
    • An experimentally validated analytical model for gate Line-Edge Roughness (LER) effects on technology scaling
    • C. Diaz, H.-J. Tao, Y.-C. Ku, A. Yen, and K. Young, "An Experimentally Validated Analytical Model for Gate Line-Edge Roughness (LER) Effects on Technology Scaling." IEEE Electron Device Letters, 22(6), 287-289 (2001).
    • (2001) IEEE Electron Device Letters , vol.22 , Issue.6 , pp. 287-289
    • Diaz, C.1    Tao, H.-J.2    Ku, Y.-C.3    Yen, A.4    Young, K.5
  • 4
    • 0036029137 scopus 로고    scopus 로고
    • Study of gate line edge roughness effects in 50 nm bulk MOSFET devices
    • S. Xiong, J. Bokor, Q. Xiang, P. Fisher, I. Dudley, and P. Rao, "Study of Gate Line Edge Roughness Effects in 50 nm Bulk MOSFET Devices." Proc. SPIE 4689, 733-741 (2002).
    • (2002) Proc. SPIE , vol.4689 , pp. 733-741
    • Xiong, S.1    Bokor, J.2    Xiang, Q.3    Fisher, P.4    Dudley, I.5    Rao, P.6
  • 5
    • 0042532317 scopus 로고    scopus 로고
    • Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness
    • A. Asenov, S. Kaya, and A. R. Brown, "Intrinsic Parameter Fluctuations in Decananometer MOSFETs Introduced by Gate Line Edge Roughness," IEEE Trans. Electron. Devices 50(5), 1254-1260 (2003).
    • (2003) IEEE Trans. Electron. Devices , vol.50 , Issue.5 , pp. 1254-1260
    • Asenov, A.1    Kaya, S.2    Brown, A.R.3
  • 8
    • 3843130605 scopus 로고    scopus 로고
    • Effect of line edge roughness (LER) and line width roughness (LWR) on sub-100 nm device performance
    • J.-Y. Lee, J. Shin, H.-W. Kim, S.-G. Woo, H.-K. Cho, W.-S. Han, and J.-T. Moon, "Effect of line edge roughness (LER) and line width roughness (LWR) on Sub-100 nm Device Performance," Proc. SPIE 5376, 426-433 (2004).
    • (2004) Proc. SPIE , vol.5376 , pp. 426-433
    • Lee, J.-Y.1    Shin, J.2    Kim, H.-W.3    Woo, S.-G.4    Cho, H.-K.5    Han, W.-S.6    Moon, J.-T.7
  • 9
    • 4344658756 scopus 로고    scopus 로고
    • Influence of line edge roughness on MOSFET devices with sub-50nm gates
    • K. Shibata, N. Izumi, and K. Tsujita, "Influence of line edge roughness on MOSFET devices with sub-50nm gates," Proc. SPIE 5375, 865-873 (2004).
    • (2004) Proc. SPIE , vol.5375 , pp. 865-873
    • Shibata, K.1    Izumi, N.2    Tsujita, K.3
  • 11
    • 4944245120 scopus 로고    scopus 로고
    • Line edge roughness and critical dimension variation: Fractal characterization and comparison using model functions
    • V. Constantoudis, G.P. Patsis, L.H.A. Leunissen, and E. Gogolides, "Line edge roughness and critical dimension variation: Fractal characterization and comparison using model functions," J. Vac. Sci. Technol. B 22, 1974-1981 (2004).
    • (2004) J. Vac. Sci. Technol. B , vol.22 , pp. 1974-1981
    • Constantoudis, V.1    Patsis, G.P.2    Leunissen, L.H.A.3    Gogolides, E.4
  • 12
    • 33749681265 scopus 로고    scopus 로고
    • (private communication) called this to my attention
    • Daniel J. C. Herr (private communication) called this to my attention.
    • Herr, D.J.C.1
  • 14
    • 24644477476 scopus 로고    scopus 로고
    • Unbiased estimation of linewidth roughness
    • in press
    • J. S. Villarrubia and B. D. Bunday, "Unbiased Estimation of Linewidth Roughness," Proc. SPIE 5752 (2005), in press.
    • (2005) Proc. SPIE , vol.5752
    • Villarrubia, J.S.1    Bunday, B.D.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.