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Volumn 5752, Issue I, 2005, Pages 480-488

Unbiased estimation of linewidth roughness

Author keywords

Line edge roughness (LER); Linewidth roughness (LWR); Measurement algorithms; Measurement bias; Scanning electron microscopy (SEM)

Indexed keywords

LINE EDGE ROUGHNESS (LER); LINEWIDTH ROUGHNESS (LWR); MEASUREMENT ALGORITHMS; MEASUREMENT BIAS;

EID: 24644477476     PISSN: 16057422     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.599981     Document Type: Conference Paper
Times cited : (93)

References (12)
  • 1
    • 0035364688 scopus 로고    scopus 로고
    • An experimentally validated analytical model for gate Line-Edge Roughness (LER) effects on technology scaling
    • C. Diaz, H.-J. Tao, Y.-C. Ku, A. Yen, and K. Young, "An Experimentally Validated Analytical Model for Gate Line-Edge Roughness (LER) Effects on Technology Scaling." IEEE Electron Device Letters, 22(6), 287-289 (2001).
    • (2001) IEEE Electron Device Letters , vol.22 , Issue.6 , pp. 287-289
    • Diaz, C.1    Tao, H.-J.2    Ku, Y.-C.3    Yen, A.4    Young, K.5
  • 2
    • 0036029137 scopus 로고    scopus 로고
    • Study of gate line edge roughness effects in 50 nm bulk MOSFET devices
    • S. Xiong, and J. Bokor "Study of Gate Line Edge Roughness Effects in 50 nm Bulk MOSFET Devices." Proc. SPIE 4689, 733-741 (2002).
    • (2002) Proc. SPIE , vol.4689 , pp. 733-741
    • Xiong, S.1    Bokor, J.2
  • 4
    • 0042532317 scopus 로고    scopus 로고
    • Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness
    • A. Asenov, S. Kaya, and A. R. Brown, "Intrinsic Parameter Fluctuations in Decananometer MOSFETs Introduced by Gate Line Edge Roughness," IEEE Trans. Electron. Devices 50(5), 1254-1260 (2003).
    • (2003) IEEE Trans. Electron. Devices , vol.50 , Issue.5 , pp. 1254-1260
    • Asenov, A.1    Kaya, S.2    Brown, A.R.3
  • 5
    • 0141608680 scopus 로고    scopus 로고
    • Characterization of line-edge roughness in resist patterns and estimation of its effect on device performance
    • A. Yamaguchi, R. Tsuchiya, H. Fukuda, O. Komuro, H. Kawada, and T. Iizumi, "Characterization of Line-Edge Roughness in Resist Patterns and Estimation of its Effect on Device Performance," Proc. SPIE 5038, 689-698 (2003).
    • (2003) Proc. SPIE , vol.5038 , pp. 689-698
    • Yamaguchi, A.1    Tsuchiya, R.2    Fukuda, H.3    Komuro, O.4    Kawada, H.5    Iizumi, T.6
  • 9
    • 0141723694 scopus 로고    scopus 로고
    • A simulation study of repeatability and bias in the CD-SEM
    • J. S. Villarrubia, A. E. Vladár, M. T. Postek, "A simulation study of repeatability and bias in the CD-SEM," Proc. SPIE 5038, 138-149, 2003.
    • (2003) Proc. SPIE , vol.5038 , pp. 138-149
    • Villarrubia, J.S.1    Vladár, A.E.2    Postek, M.T.3
  • 10
    • 0141611970 scopus 로고    scopus 로고
    • CD-SEM measurement of line edge roughness test patterns for 193 nm lithography
    • B. D. Bunday, M. Bishop, J. S. Villarrubia, and A. E. Vladár, "CD-SEM Measurement of Line Edge Roughness Test Patterns for 193 nm Lithography," Proc. SPIE 5038, 2003, pp. 674-688
    • (2003) Proc. SPIE , vol.5038 , pp. 674-688
    • Bunday, B.D.1    Bishop, M.2    Villarrubia, J.S.3    Vladár, A.E.4
  • 11
    • 0141835012 scopus 로고    scopus 로고
    • Effect of bias variation on total uncertainty of CD measurements
    • V.A. Ukraintsev, "Effect of Bias Variation on Total Uncertainty of CD Measurements," Proc. SPIE 5038, 644-650(2003).
    • (2003) Proc. SPIE , vol.5038 , pp. 644-650
    • Ukraintsev, V.A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.