메뉴 건너뛰기




Volumn 5375, Issue PART 2, 2004, Pages 865-873

Influence of line edge roughness on MOSFET devices with sub-50nm gates

(3)  Shibata, K a   Izumi, N a   Tsujita, K a  

a NONE

Author keywords

Autocorrelation function; Drive current (Ion); Fluctuation; Gate; Line edge roughness (LER); MOSFET; Off state leakage (Ioff); Period; Threshold voltage (Vth)

Indexed keywords

AUTOCORREALTION FUNCTION; DRIVE CURRENT (ION); FLUCTUATION; LINE EDGE ROUGHNESS (LER);

EID: 4344658756     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1117/12.534508     Document Type: Conference Paper
Times cited : (40)

References (13)
  • 1
    • 0036928972 scopus 로고    scopus 로고
    • Determination of the line edge roughness specification for 34 nm devices
    • session 12-1
    • T. Linton, M. Candhok, B. J. Rice, and G. Schrom, "Determination of the line edge roughness specification for 34 nm devices", Technical Digest of IEDM, session 12-1, 2002.
    • (2002) Technical Digest of IEDM
    • Linton, T.1    Candhok, M.2    Rice, B.J.3    Schrom, G.4
  • 3
    • 0042532317 scopus 로고    scopus 로고
    • Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness
    • A. Asenov, S. Kaya, and A. R. Brown, "Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness", Trans. on Electron devices, vol. 50, no. 5, pp 1254-1260, 2003.
    • (2003) Trans. on Electron Devices , vol.50 , Issue.5 , pp. 1254-1260
    • Asenov, A.1    Kaya, S.2    Brown, A.R.3
  • 4
    • 0842331392 scopus 로고    scopus 로고
    • Atomistic 3D process/device simulation considering gate line-edge roughness and poly-Si random crystal orientation effects
    • session 9-5
    • M. Hane, T. Ikezawa, and T. Ezaki, "Atomistic 3D process/device simulation considering gate line-edge roughness and poly-Si random crystal orientation effects", Technical Digest of IEDM, session 9-5, 2003.
    • (2003) Technical Digest of IEDM
    • Hane, M.1    Ikezawa, T.2    Ezaki, T.3
  • 5
    • 0035364688 scopus 로고    scopus 로고
    • An experimentally validated analytical model for gate line-edge roughness (LER) effects on technology scaling
    • C. H. Diaz, H. J. Tao, Y. C. Ku, A. Yen, and K. Young, "An experimentally validated analytical model for gate line-edge roughness (LER) effects on technology scaling", Electron Device Letters, vol. 22, no. 6, pp. 287-289, 2001.
    • (2001) Electron Device Letters , vol.22 , Issue.6 , pp. 287-289
    • Diaz, C.H.1    Tao, H.J.2    Ku, Y.C.3    Yen, A.4    Young, K.5
  • 6
    • 0035982537 scopus 로고    scopus 로고
    • Study of the acid-diffusion effect on line edge roughness using the edge roughness evaluation method
    • M. Yoshizawa, and S. Moriya, "Study of the acid-diffusion effect on line edge roughness using the edge roughness evaluation method", J. Vac. Sci. Technol. B, vol. 20, no. 4, pp. 1342-1347, 2002.
    • (2002) J. Vac. Sci. Technol. B , vol.20 , Issue.4 , pp. 1342-1347
    • Yoshizawa, M.1    Moriya, S.2
  • 7
  • 9
    • 0141608680 scopus 로고    scopus 로고
    • Characterization of line-edge roughness in resist patterns and estimation of its effect on device performance
    • A. Yamaguchi, R. Tsuchiya, H. Fukuda, O. Komuro, H. Kawada, and T. Iizumi, "Characterization of line-edge roughness in resist patterns and estimation of its effect on device performance", Proc. SPIE, vol. 5038, pp. 689-698, 2003.
    • (2003) Proc. SPIE , vol.5038 , pp. 689-698
    • Yamaguchi, A.1    Tsuchiya, R.2    Fukuda, H.3    Komuro, O.4    Kawada, H.5    Iizumi, T.6
  • 10
    • 4344711901 scopus 로고    scopus 로고
    • Evaluation of transistor property variations within chips on 300 nm wafers using a new MOSFET array test structure
    • N. Izumi, H. Ozaki, Y. Nakagawa, N. Kasai, M. yasuhira, and T. Arikado, "Evaluation of transistor property variations within chips on 300 nm wafers using a new MOSFET array test structure", Proc. ISSM, pp. 91-94, 2003.
    • (2003) Proc. ISSM , pp. 91-94
    • Izumi, N.1    Ozaki, H.2    Nakagawa, Y.3    Kasai, N.4    Yasuhira, M.5    Arikado, T.6
  • 11
    • 0035450052 scopus 로고    scopus 로고
    • Metrology method for the correlation of line edge roughness for different resists before and after etch
    • S. Winkelmeier, M. Sarstedt, M. Ereken, M. Goethals, and K. Ronse, "Metrology method for the correlation of line edge roughness for different resists before and after etch", Microelectronic Engineering, pp. 665-672, 2001.
    • (2001) Microelectronic Engineering , pp. 665-672
    • Winkelmeier, S.1    Sarstedt, M.2    Ereken, M.3    Goethals, M.4    Ronse, K.5
  • 12
    • 0041361764 scopus 로고    scopus 로고
    • Characterization of line edge roughness in resist patterns by using Fourier analysis and auto-correlation function
    • A. Yamaguchi, and O. Komuro, "Characterization of line edge roughness in resist patterns by using Fourier analysis and auto-correlation function", Jpn. J. Appl. Phys. vol. 42, no. 6B, pp. 3763-3770, 2003.
    • (2003) Jpn. J. Appl. Phys. , vol.42 , Issue.6 B , pp. 3763-3770
    • Yamaguchi, A.1    Komuro, O.2
  • 13
    • 0038457081 scopus 로고    scopus 로고
    • Quantification of line-edge roughness of photoresists. 2. Scaling and fractal analysis and the best roughness descriptors
    • V.Constantoudis, G.P. Patsis, A. Tserepi, and E. Gogolides, "Quantification of line-edge roughness of photoresists. 2. Scaling and fractal analysis and the best roughness descriptors", J. Vac. Sci. Technol. B, vol. 21, no. 3, pp. 1019-1026, 2003.
    • (2003) J. Vac. Sci. Technol. B , vol.21 , Issue.3 , pp. 1019-1026
    • Constantoudis, V.1    Patsis, G.P.2    Tserepi, A.3    Gogolides, E.4


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.