-
1
-
-
84947229460
-
A framework for microprocessor correctness statements
-
Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME). Springer
-
M. D. Aagaard, B. Cook, N. A. Day, and R. B. Jones. A framework for microprocessor correctness statements. In Advanced Research Working Conference on Correct Hardware Design and Verification Methods (CHARME), volume 2144 of Lecture Notes in Computer Science, pages 433-448. Springer, 2001.
-
(2001)
Lecture Notes in Computer Science
, vol.2144
, pp. 433-448
-
-
Aagaard, M.D.1
Cook, B.2
Day, N.A.3
Jones, R.B.4
-
2
-
-
33745123504
-
Synchronization-at-retirement for pipeline verification
-
Formal Methods in Computer-Aided Design (FMCAD). Springer-Verlag, November
-
M. D. Aagaard, N. A. Day, and R. B. Jones. Synchronization-at-retirement for pipeline verification. In Formal Methods in Computer-Aided Design (FMCAD), volume 3312 of LNCS, pages 113-127. Springer-Verlag, November 2004.
-
(2004)
LNCS
, vol.3312
, pp. 113-127
-
-
Aagaard, M.D.1
Day, N.A.2
Jones, R.B.3
-
4
-
-
84957091519
-
Exploiting positive equality in a logic of equality with uninterpreted functions
-
N. Halbwachs and D. Peled, editors, Computer-Aided Verification-CAV '99. Springer-Verlag, 1999
-
R. E. Bryant, S. German, and M. N. Velev. Exploiting positive equality in a logic of equality with uninterpreted functions. In N. Halbwachs and D. Peled, editors, Computer-Aided Verification-CAV '99, volume 1633 of LNCS, pages 470-482. Springer-Verlag, 1999.
-
LNCS
, vol.1633
, pp. 470-482
-
-
Bryant, R.E.1
German, S.2
Velev, M.N.3
-
5
-
-
84937570704
-
Modeling and verifying systems using a logic of counter arithmetic with lambda expressions and uninterpreted functions
-
E. Brinksma and K. Larsen, editors, Computer-Aided Verification - CAV 2002. Springer-Verlag
-
R. E. Bryant, S. K. Lahiri, and S. Seshia. Modeling and verifying systems using a logic of counter arithmetic with lambda expressions and uninterpreted functions. In E. Brinksma and K. Larsen, editors, Computer-Aided Verification - CAV 2002, volume 2404 of LNCS, pages 78-92. Springer-Verlag, 2002.
-
(2002)
LNCS
, vol.2404
, pp. 78-92
-
-
Bryant, R.E.1
Lahiri, S.K.2
Seshia, S.3
-
6
-
-
84958772916
-
Automatic verification of pipelined microprocessor control
-
Computer-Aided Verification (CAV '94). Springer-Verlag
-
J. R. Burch and D. L. Dill. Automatic verification of pipelined microprocessor control. In Computer-Aided Verification (CAV '94), volume 818 of LNCS, pages 68-80. Springer-Verlag, 1994.
-
(1994)
LNCS
, vol.818
, pp. 68-80
-
-
Burch, J.R.1
Dill, D.L.2
-
7
-
-
22644450348
-
Assume-guarantee refinement between different time scales
-
N. Halbwachs and D. Peled, editors, Computer-Aided Verification - CAV '99. Springer-Verlag
-
T. A. Henzinger, S. Qadeer, and S. K. Rajamani. Assume-guarantee refinement between different time scales. In N. Halbwachs and D. Peled, editors, Computer-Aided Verification - CAV '99, volume 1633 of LNCS, pages 208-221. Springer-Verlag, 1999.
-
(1999)
LNCS
, vol.1633
, pp. 208-221
-
-
Henzinger, T.A.1
Qadeer, S.2
Rajamani, S.K.3
-
8
-
-
84957082109
-
Proof of correctness of a processor with reorder buffer using the completion functions approach
-
N. Halbwachs and D. Peled, editors, Computer-Aided Verification - CAV '99. Springer-Verlag
-
R. Hosabettu, M. Srivas, and G. Gopalakrishnan. Proof of correctness of a processor with reorder buffer using the completion functions approach. In N. Halbwachs and D. Peled, editors, Computer-Aided Verification - CAV '99, volume 1633 of LNCS. Springer-Verlag, 1999.
-
(1999)
LNCS
, vol.1633
-
-
Hosabettu, R.1
Srivas, M.2
Gopalakrishnan, G.3
-
11
-
-
84948178956
-
Modeling and verification of out-of-order microprocessors using UCLID
-
Formal Methods in Computer-Aided Design (FMCAD'02). Springer-Verlag
-
S. Lahiri, S. Seshia, and R. Bryant. Modeling and verification of out-of-order microprocessors using UCLID. In Formal Methods in Computer-Aided Design (FMCAD'02), volume 2517 of LNCS, pages 142-159. Springer-Verlag, 2002.
-
(2002)
LNCS
, vol.2517
, pp. 142-159
-
-
Lahiri, S.1
Seshia, S.2
Bryant, R.3
-
12
-
-
84947266085
-
Correctness of pipelined machines
-
W. A. Hunt, Jr. and S. D. Johnson, editors, Formal Methods in Computer-Aided Design-FMCAD 2000. Springer-Verlag
-
P. Manolios. Correctness of pipelined machines. In W. A. Hunt, Jr. and S. D. Johnson, editors, Formal Methods in Computer-Aided Design-FMCAD 2000, volume 1954 of LNCS, pages 161-178. Springer-Verlag, 2000.
-
(2000)
LNCS
, vol.1954
, pp. 161-178
-
-
Manolios, P.1
-
13
-
-
2442626637
-
-
PhD thesis, University of Texas at Austin, August
-
P. Manolios. Mechanical Verification of Reactive Systems. PhD thesis, University of Texas at Austin, August 2001. See URL http://www.cc.gatech.edu/~manolios/-publications.html.
-
(2001)
Mechanical Verification of Reactive Systems
-
-
Manolios, P.1
-
14
-
-
0142152291
-
A compositional theory of refinement for branching time
-
D. Geist and E. Tronci, editors, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003. Springer-Verlag
-
P. Manolios. A compositional theory of refinement for branching time. In D. Geist and E. Tronci, editors, 12th IFIP WG 10.5 Advanced Research Working Conference, CHARME 2003, volume 2860 of LNCS, pages 304-318. Springer-Verlag, 2003.
-
(2003)
LNCS
, vol.2860
, pp. 304-318
-
-
Manolios, P.1
-
15
-
-
3042511935
-
Automatic verification of safety and liveness for XScale-like processor models using WEB-refinements
-
P. Manolios and S. Srinivasan. Automatic verification of safety and liveness for XScale-like processor models using WEB-refinements. In Design Automation and Test in Europe, DATE'04, 2004.
-
(2004)
Design Automation and Test in Europe, DATE'04
-
-
Manolios, P.1
Srinivasan, S.2
-
17
-
-
84863924303
-
Verification of an implementation of Tomasulo's algorithm by compositional model checking
-
A. J. Hu and M. Y. Vardi, editors, Computer Aided Verification (CAV '98). Springer-Verlag
-
K. L. McMillan. Verification of an implementation of Tomasulo's algorithm by compositional model checking. In A. J. Hu and M. Y. Vardi, editors, Computer Aided Verification (CAV '98), volume 1427 of LNCS, pages 110-121. Springer-Verlag, 1998.
-
(1998)
LNCS
, vol.1427
, pp. 110-121
-
-
McMillan, K.L.1
-
20
-
-
0034852165
-
Chaff: Engineering an efficient SAT solver
-
M. W. Moskewicz, C. F. Madigan, Y. Zhao, L. Zhang, and S. Malik. Chaff: Engineering an efficient SAT solver. Design Automation Conference (DAC'01), pages 530-535, 2001.
-
(2001)
Design Automation Conference (DAC'01)
, pp. 530-535
-
-
Moskewicz, M.W.1
Madigan, C.F.2
Zhao, Y.3
Zhang, L.4
Malik, S.5
-
21
-
-
84949194132
-
A simple characterization of stuttering bisimulation
-
17th Conference on Foundations of Software Technology and Theoretical Computer Science
-
K. S. Namjoshi. A simple characterization of stuttering bisimulation. In 17th Conference on Foundations of Software Technology and Theoretical Computer Science, volume 1346 of LNCS, pages 284-296, 1997.
-
(1997)
LNCS
, vol.1346
, pp. 284-296
-
-
Namjoshi, K.S.1
-
23
-
-
33745180681
-
Deductive verification of pipelined machines using first-order quantification
-
Computer-Aided Verification, CAV04. Springer-Verlag
-
S. Ray and W. A. Hunt, Jr. Deductive verification of pipelined machines using first-order quantification. In Computer-Aided Verification, CAV04, volume 3114 of LNCS, pages 31-43. Springer-Verlag, 2004.
-
(2004)
LNCS
, vol.3114
, pp. 31-43
-
-
Ray, S.1
Hunt Jr., W.A.2
-
26
-
-
2442569923
-
Verification of a simple pipelined machine model
-
M. Kaufmann, P. Manolios, and J. S. Moore, editors. Kluwer Academic Publishers, June
-
J. Sawada. Verification of a simple pipelined machine model. In M. Kaufmann, P. Manolios, and J. S. Moore, editors, Computer-Aided Reasoning: ACL2 Case Studies, pages 137-150. Kluwer Academic Publishers, June 2000.
-
(2000)
Computer-aided Reasoning: ACL2 Case Studies
, pp. 137-150
-
-
Sawada, J.1
-
27
-
-
84863974979
-
Processor verification with precise exceptions and speculative execution
-
A. J. Hu and M. Y. Vardi, editors, Computer Aided Verification (CAV '98). Springer-Verlag
-
J. Sawada and W. A. Hunt, Jr. Processor verification with precise exceptions and speculative execution. In A. J. Hu and M. Y. Vardi, editors, Computer Aided Verification (CAV '98), volume 1427 of LNCS, pages 135-146. Springer-Verlag, 1998.
-
(1998)
LNCS
, vol.1427
, pp. 135-146
-
-
Sawada, J.1
Hunt Jr., W.A.2
-
28
-
-
3042639039
-
Formal verification of an Intel XScale processor model with scoreboarding, specialized execution pipelines, and imprecise data-memory exceptions
-
S. K. Srinivasan and M. N. Velev. Formal verification of an Intel XScale processor model with scoreboarding, specialized execution pipelines, and imprecise data-memory exceptions. In Formal Methods and Models for Codesign (MEMOCODE'03), pages 65-74, 2003.
-
(2003)
Formal Methods and Models for Codesign (MEMOCODE'03)
, pp. 65-74
-
-
Srinivasan, S.K.1
Velev, M.N.2
|