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Volumn 1633, Issue , 1999, Pages 470-482

Exploiting positive equality in a logic of equality with uninterpreted functions

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED ANALYSIS; FORMAL LOGIC; PIPELINES;

EID: 84957091519     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-48683-6_40     Document Type: Conference Paper
Times cited : (64)

References (10)
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    • G. Gopalakrishnan and P. Windley, eds., LNCS 1522, Springer-Verlag, November, [BBCZ98]
    • [BBCZ98] S. Berezin, A. Biere, E. M. Clarke, and Y. Zhu, "Combining symbolic model checking with uninterpreted functions for out of order processor verification," Formal Methods in Computer-Aided Design FMCAD '98, G. Gopalakrishnan and P. Windley, eds., LNCS 1522, Springer-Verlag, November, 1998, pp. 187-201.
    • (1998) Formal Methods in Computer-Aided Design FMCAD '98 , pp. 187-201
    • Berezin, S.1    Biere, A.2    Clarke, E.M.3    Zhu, Y.4
  • 3
    • 0004138503 scopus 로고    scopus 로고
    • Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic
    • Carnegie Mellon University, [BGV99]
    • [BGV99] R. E. Bryant, S. German, and M. N. Velev, "Processor verification using efficient reductions of the logic of uninterpreted functions to propositional logic," Technical report CMU-CS-99-115, Carnegie Mellon University, 1999. Available as: http://www.cs.cmu.edu/~bryant/pubdir/cmu-cs-99-115.ps.
    • (1999) Technical report CMU-CS-99-115
    • Bryant, R.E.1    German, S.2    Velev, M.N.3
  • 4
    • 84958772916 scopus 로고
    • Automated verification of pipelined microproces sor control
    • D. L. Dill, ed., LNCS 818, Springer-Verlag, June, [BD94]
    • [BD94] J. R. Burch, and D. L. Dill, "Automated verification of pipelined microproces sor control," Computer-Aided Verification CAV '94, D. L. Dill, ed., LNCS 818, Springer-Verlag, June, 1994, pp. 68-80.
    • (1994) Computer-Aided Verification CAV '94 , pp. 68-80
    • Burch, J.R.1    Dill, D.L.2
  • 6
    • 84863922391 scopus 로고    scopus 로고
    • BDD based procedures for a theory of equality with uninterpreted functions
    • J. Hu and M.Y. Vardi, eds., LNCS 1427, Springer-Verlag, June, [GSZAS98]
    • [GSZAS98] A. Goel, K. Sajid, H. Zhou, A. Aziz, and V. Singhal, "BDD based procedures for a theory of equality with uninterpreted functions," Computer-Aided Verification CAV '98, A. J. Hu and M.Y. Vardi, eds., LNCS 1427, Springer-Verlag, June, 1998, pp. 244-255.
    • (1998) Computer-Aided Verification CAV '98, A , pp. 244-255
    • Goel, A.1    Sajid, K.2    Zhou, H.3    Aziz, A.4    Singhal, V.5
  • 7
    • 84948996603 scopus 로고    scopus 로고
    • Validity checking in the theory of equality with uinterpreted functions using finite instantiations
    • Unpublished paper presented at the, [HKGB97]
    • [HKGB97] R. Hojati, A. Kuehlmann, S. German, and R. K. Brayton, "Validity checking in the theory of equality with uinterpreted functions using finite instantiations," Unpublished paper presented at the International Workshop on Logic Synthesis, 1997.
    • (1997) International Workshop on Logic Synthesis
    • Hojati, R.1    Kuehlmann, A.2    German, S.3    Brayton, R.K.4
  • 8
    • 0019003680 scopus 로고
    • Fast decision procedures based on the congruence closure
    • [N080]
    • [N080] G. Nelson, and D. C. Oppen, "Fast decision procedures based on the congruence closure," J. ACM, Vol. 27, No. 2 (1980), pp. 356-364.
    • (1980) J. ACM , vol.27 , Issue.2 , pp. 356-364
    • Nelson, G.1    Oppen, D.C.2
  • 10
    • 84948966443 scopus 로고    scopus 로고
    • Bit-level abstraction in the verification of pipelined microprocessors by correspondence checking
    • LNCS 1522, Springer-Verlag, November, [VB98]
    • [VB98] M. N. Velev, and R.E. Bryant, "Bit-level abstraction in the verification of pipelined microprocessors by correspondence checking." Formal Methods in Computer-Aided Design FMCAD '98, G. Gopalakrishnan and P. Windley, eds., LNCS 1522, Springer-Verlag, November, 1998, pp. 18-35.
    • (1998) Formal Methods in Computer-Aided Design FMCAD '98, G. Gopalakrishnan and P. Windley, eds , pp. 18-35
    • Velev, M.N.1    Bryant, R.E.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.