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Volumn 1633, Issue , 1999, Pages 47-59

Proof of correctness of a processor with reorder buffer using the completion functions approach

Author keywords

[No Author keywords available]

Indexed keywords

ABSTRACTING; RECORDING INSTRUMENTS;

EID: 84957082109     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/3-540-48683-6_7     Document Type: Conference Paper
Times cited : (34)

References (13)
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    • 84957633777 scopus 로고    scopus 로고
    • Validity checking for combinations of theories with equality
    • Mandayam Srivas and Albert Camilleri, editors, volume 1166 of LNCS, Springer-Verlag, November 47 [BDL96]
    • [BDL96] Clark Barrett, David Dill, and Jeremy Levitt. Validity checking for combinations of theories with equality. In Mandayam Srivas and Albert Camilleri, editors, Formal Methods in Computer-Aided Design, FMCAD '96, volume 1166 of LNCS, pages 187-201. Springer-Verlag, November 1996. 47
    • (1996) Formal Methods in Computer-Aided Design, FMCAD '96 , pp. 187-201
    • Barrett, C.1    Dill, D.2    Levitt, J.3
  • 2
    • 84959036825 scopus 로고
    • Effective theorem proving for hardware verification
    • Ramayya Kumar and Thomas Kropf, editors, Springer-Verlag, September 47 [CRSS94]
    • [CRSS94]. D. Cyrluk, S. Rajan, N. Shankar, and M. K. Srivas. Effective theorem proving for hardware verification. In Ramayya Kumar and Thomas Kropf, editors, Theorem Provers in Circuit Design, TPCD '94, volume 910 of LNCS, pages 203-222. Springer-Verlag, September 1994. 47
    • (1994) Theorem Provers in Circuit Design, TPCD '94, volume 910 of LNCS , pp. 203-222
    • Cyrluk, D.1    Rajan, S.2    Shankar, N.3    Srivas, M.K.4
  • 7
    • 84957074783 scopus 로고    scopus 로고
    • Mandayam Srivas, and Ganesh Gopalakrishnan
    • Hu and Vardi [HV98],. 47, 48, 48, 50, 52, 57, 59 [HSG98]
    • [HSG98]. Ravi Hosabettu, Mandayam Srivas, and Ganesh Gopalakrishnan. Decomposing the proof of correctness of pipelined microprocessors. In Hu and Vardi [HV98], pages 122-134. 47, 48, 48, 50, 52, 57, 59
    • Decomposing the proof of correctness of pipelined microprocessors , pp. 122-134
    • Hosabettu, R.1
  • 8
    • 84885237802 scopus 로고    scopus 로고
    • editors. volume 1427 of LNCS, Vancouver, BC, Canada, June/July. Springer-Verlag. 59, 59, 59 [HV98]
    • [HV98]. Alan J. Hu and Moshe Y. Vardi, editors. Computer-Aided Verification, CAV '98, volume 1427 of LNCS, Vancouver, BC, Canada, June/July 1998. Springer-Verlag. 59, 59, 59
    • (1998) Computer-Aided Verification, CAV '98
    • Hu, A.J.1    Vardi, M.Y.2
  • 9
    • 84948986759 scopus 로고    scopus 로고
    • Reducing manual abstraction in formal verification of out-of-order execution
    • [GW98], 49, 49 [JSD98]
    • [JSD98]. Robert Jones, Jens Skakkebaek, and David Dill. Reducing manual abstraction in formal verification of out-of-order execution. In Gopalakrishnan and Windley [GW98], pages 2-17. 49, 49
    • Gopalakrishnan and Windley , pp. 2-17
    • Jones, R.1    Skakkebaek, J.2    Dill, D.3
  • 11
    • 0029251055 scopus 로고
    • Formal verification for fault-tolerant architectures: Prolegomena to the design of PVS
    • February 48 [ORSvH95]
    • [ORSvH95]. Sam Owre, John Rushby, Natarajan Shankar, and Friedrich von Henke. Formal verification for fault-tolerant architectures: Prolegomena to the design of PVS. IEEE Transactions on Software Engineering, 21(2):107-125, February 1995. 48
    • (1995) IEEE Transactions on Software Engineering , vol.21 , Issue.2 , pp. 107-125
    • Owre, S.1    Rushby, J.2    Shankar, N.3    von Henke, F.4
  • 12
    • 84948983108 scopus 로고    scopus 로고
    • Verification of data-insensitive circuits: An in-order-retirement case study
    • [GW98]. 49,49 [PA98]
    • [PA98]. Amir Pnueli and Tamarah Arons. Verification of data-insensitive circuits: An in-order-retirement case study. In Gopalakrishnan and Windley [GW98], pages 351-368. 49,49
    • Gopalakrishnan and Windley , pp. 351-368
    • Pnueli, A.1    Arons, T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.