Post silicon power/performance optimization in the presence of process variations using individual well adaptive body biasing (IWABB)

Proceedings - 5th International Symposium on Quality Electronic Design, ISQUED 2004

Volumn , Issue , 2004, Pages 453-458

  Gregg, Justin ^a   Chen, Tom W ^b  

^a Engineering Research Center and Hydraulics Laboratory   (United States)

^b HEWLETT PACKARD COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ELECTRIC POTENTIAL; NETWORKS (CIRCUITS); OPTIMIZATION; PROBLEM SOLVING; RANDOM ACCESS STORAGE;

ADAPTIVE BODY BIASING (ABB); CRITICAL DIMENSIONS (CD); POWER CONSUMPTION;

SILICON WAFERS;

EID: 2942674894     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISQED.2004.1283715     Document Type: Conference Paper

References (16)

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