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Volumn , Issue , 2005, Pages 59-66

RFCMOS ESD protection and reliability

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EID: 28044445629     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (15)

References (19)
  • 2
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    • Investigation on different ESD protection strategies devoted to 3.3 v RF applications (2 Ghz) in a 0.18um CMOS process
    • C. Richier, P. Salome, G. Mabboux, I. Zaza, A. Juge, P. Mortini, "Investigation on Different ESD Protection Strategies Devoted to 3.3 V RF Applications (2 Ghz) in a 0.18um CMOS Process", Proc. EOS/ESD Symp, pp. 251-259, 2000.
    • (2000) Proc. EOS/ESD Symp , pp. 251-259
    • Richier, C.1    Salome, P.2    Mabboux, G.3    Zaza, I.4    Juge, A.5    Mortini, P.6
  • 4
    • 0037969169 scopus 로고    scopus 로고
    • Broadband ESD protection circuits in CMOS technology
    • S. Galal and B. Razavi, "Broadband ESD protection circuits in CMOS technology", in ISSCC Dig. Tech. Papers, pp. 182-183, 2003.
    • (2003) ISSCC Dig. Tech. Papers , pp. 182-183
    • Galal, S.1    Razavi, B.2
  • 6
    • 17644381305 scopus 로고    scopus 로고
    • A 5 GHz CMOS low-noise amplifier with inductive ESD protection exceeding 3 kV HBM
    • P. Leroux, and M. Steyaert, "A 5 GHz CMOS Low-Noise Amplifier with Inductive ESD Protection Exceeding 3 kV HBM", in Proc ESSCIRC, pp. 295-298, 2004.
    • (2004) Proc ESSCIRC , pp. 295-298
    • Leroux, P.1    Steyaert, M.2
  • 8
    • 0036685489 scopus 로고    scopus 로고
    • Analysis and design of distributed ESD protection circuits for high-speed mixed-signal and RF Ics
    • August
    • C. Ito, K. Banerjee, and R. W. Dutton, "Analysis and Design of Distributed ESD Protection Circuits for High-Speed Mixed-Signal and RF Ics", IEEE Trans. Electron Dev., Vol. 49, No. 8, pp. 1444-1454, August 2002.
    • (2002) IEEE Trans. Electron Dev. , vol.49 , Issue.8 , pp. 1444-1454
    • Ito, C.1    Banerjee, K.2    Dutton, R.W.3
  • 9
    • 14544287273 scopus 로고    scopus 로고
    • Decreasing-size distributed ESD protection scheme for broad-band RF circuits
    • February
    • M-Dou Ker, and B-J. Kuo, "Decreasing-Size Distributed ESD Protection Scheme for Broad-Band RF Circuits", IEEE Trans. MTT, Vol. 53, No. 2, pp. 582-589, February 2005.
    • (2005) IEEE Trans. MTT , vol.53 , Issue.2 , pp. 582-589
    • Ker, M.-D.1    Kuo, B.-J.2
  • 11
    • 11344293531 scopus 로고    scopus 로고
    • ESD protection design for Giga-Hz RF CMOS LNA with novel impedance-isolation technique
    • M. D. Ker, and C.M. Lee, "ESD Protection Design for Giga-Hz RF CMOS LNA with Novel Impedance-Isolation Technique", in Proc. EOS/ESD Symp., pp. 204-213, 2003.
    • (2003) Proc. EOS/ESD Symp. , pp. 204-213
    • Ker, M.D.1    Lee, C.M.2
  • 12
    • 0037421742 scopus 로고    scopus 로고
    • Cancellation technique to provide ESD protection for multi-GHz RF inputs
    • S. Hyvonen, S. Joshi and E. Rosenbaum, "Cancellation technique to provide ESD protection for multi-GHz RF inputs", Electron. Lett., Vol. 39 No. 3, pp. 284-286, 2003.
    • (2003) Electron. Lett. , vol.39 , Issue.3 , pp. 284-286
    • Hyvonen, S.1    Joshi, S.2    Rosenbaum, E.3
  • 14
    • 0031147079 scopus 로고    scopus 로고
    • A 1.5-V 1.5-GHz CMOS: Low noise amplifier
    • May
    • D. K. Shaeffer and T. H. Lee, "A 1.5-V 1.5-GHz CMOS: Low noise amplifier," IEEE J. Solid-State Circuits, vol. 32, pp. 745-759, May 1997.
    • (1997) IEEE J. Solid-state Circuits , vol.32 , pp. 745-759
    • Shaeffer, D.K.1    Lee, T.H.2
  • 19
    • 2442669253 scopus 로고    scopus 로고
    • Wafer-level packaging technology for high-Q on-chip inductors and transmission lines
    • April
    • G. Carchon, W. De Raedt, and E. Beyne, "Wafer-level packaging technology for High-Q On-chip Inductors and Transmission Lines", in IEEE Trans. MTT, vol. 52, no.4, pp. 1244-1251, April 2004.
    • (2004) IEEE Trans. MTT , vol.52 , Issue.4 , pp. 1244-1251
    • Carchon, G.1    De Raedt, W.2    Beyne, E.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.