A 5 GHz CMOS low-noise amplifier with inductive ESD protection exceeding 3 kV HBM

ESSCIRC 2004 - Proceedings of the 30th European Solid-State Circuits Conference

Volumn , Issue , 2004, Pages 295-298

  Leroux, Paul ^a   Steyaert, Michiel ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BANDPASS FILTERS; BUFFER AMPLIFIERS; CAPACITANCE; COMPUTER SIMULATION; GAIN MEASUREMENT; MICROPROCESSOR CHIPS; POWER INDUCTORS; RADIO FREQUENCY AMPLIFIERS; THICKNESS CONTROL; TRANSDUCERS;

GATE OXIDES; INTEGRATED INDUCTORS; LOSSLESS TRANSFORMERS; LOW-NOISE AMPLIFIERS (LNA);

CMOS INTEGRATED CIRCUITS;

EID: 17644381305     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. C.-Y. Cha and S.-G. Lee, "A 5.2GHz LNA in 0.35 μm CMOS Utilizing Inter-stage Series Resonance and Optimizing the Substrate Resistance", IEEE Journal of Solid-State Circuits, vol. 38, no. 4, pp. 669-672, Apr. 2003.
2. S. Dabral and T. J. Maloney, Basic ESD and I/O Design, Wiley Interscience, New York, 1998.
3. G. Gramegna, M. Paparo, P. G. Erratico, and P. De Vita, "A sub-1-dB NF 2.3-kV BSD-Protected 900-MHz LNA", IEEE Journal of Solid-State Circuits, vol. 36, no. 7, pp. 1010-1017, July 2001.
4. J. Janssens, and M. Steyaert, CMOS Cellular Receiver Fron-Ends, Kluwer Academic Publishers, Boston, 2002.
5. P. Leroux and M. Steyaert, "A high performance 5.2GHz LNA with an on-chip inductor to provide BSD-protection", IEE Electronics Letters, vol. 37, no. 5, pp. 467-469, Mar. 2001.
6. P. Leroux, J. Janssens, and M. Steyaert, "A 0.SdB NF BSD-protected 9mW CMOS LNA Operating at 1.23 GHz", IEEE Journal of Solid-State Circuits, vol. 37, no. 6, pp. 760-765, June 2002.