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Volumn , Issue , 2004, Pages 147-156

A case for clumsy packet processors

Author keywords

[No Author keywords available]

Indexed keywords

CLOCK FREQUENCY; ENERGY-DELAY-FALLABILITY PRODUCTS; SUB-MICRON EFFECTS; USER EXPECTATIONS;

EID: 21644487989     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (8)

References (28)
  • 1
    • 33847113086 scopus 로고    scopus 로고
    • Cost reduction and evaluation of a temporary faults detecting technique
    • March
    • Anghel, L.a.M.N. Cost Reduction and Evaluation of a Temporary Faults Detecting Technique, in Design Automation and Test in Europe (DATE). March 2000.
    • (2000) Design Automation and Test in Europe (DATE)
    • Anghel, L.A.M.N.1
  • 3
    • 0033321638 scopus 로고    scopus 로고
    • DIVA: A reliable substrate for deep submicron microarchitecture design
    • Nov.
    • Austin, T. DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design, in International Symposium on Microarchitecture. Nov. 1999.
    • (1999) International Symposium on Microarchitecture
    • Austin, T.1
  • 5
    • 11144344699 scopus 로고    scopus 로고
    • Ensuring dependable processor performance: An experience report on pre-silicon performance validation
    • July
    • Bose, P. Ensuring dependable processor performance: an experience report on pre-silicon performance validation. in International Conference on Dependable Systems and Networks (DSN). July 2000.
    • (2000) International Conference on Dependable Systems and Networks (DSN)
    • Bose, P.1
  • 8
    • 29244467743 scopus 로고    scopus 로고
    • Transient-fault recovery for chip multiprocessors
    • June San Diego, CA
    • Gomaa, M., et al. Transient-Fault Recovery for Chip Multiprocessors. in International Symposium on Computer Architecture. June 2003. San Diego, CA.
    • (2003) International Symposium on Computer Architecture
    • Gomaa, M.1
  • 11
    • 0033691062 scopus 로고    scopus 로고
    • Voltage-clock-scaling adaptive scheduling techniques for low power in hard real-time Systems
    • May
    • Krishna, C.M. and L.-H. Lee. Voltage-clock-scaling adaptive scheduling techniques for low power in hard real-time Systems. in Real Time Technology and Applications Symp. May 2000.
    • (2000) Real Time Technology and Applications Symp.
    • Krishna, C.M.1    Lee, L.-H.2
  • 14
    • 0030285348 scopus 로고    scopus 로고
    • A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor
    • Montanaro J., et al., A 160-MHz, 32-b, 0.5-W CMOS RISC microprocessor. IEEE Journal of Solid-State Circuits, 1996. 31(11): p. 1703-14.
    • (1996) IEEE Journal of Solid-State Circuits , vol.31 , Issue.11 , pp. 1703-1714
    • Montanaro, J.1
  • 24
    • 85013295511 scopus 로고
    • Efficient fair queuing using deficit round robin
    • Aug/Sep Camridge / MA
    • Shreedhar, G.V. Efficient Fair Queuing using Deficit Round Robin. in SIGCOMM'95. Aug/Sep 1995. Camridge / MA.
    • (1995) SIGCOMM'95
    • Shreedhar, G.V.1
  • 25
    • 0029779792 scopus 로고    scopus 로고
    • Modeling the cosmic-ray-induced soft-error rate in integrated circuits: An overview
    • Jan.
    • Srinivasan, G.R., Modeling the Cosmic-Ray-Induced Soft-Error Rate in Integrated Circuits: An Overview. IBM Journal of Research and Development, Jan. 1996. 40(1): p. p. 77-89.
    • (1996) IBM Journal of Research and Development , vol.40 , Issue.1 , pp. 77-89
    • Srinivasan, G.R.1
  • 26
    • 0029779792 scopus 로고    scopus 로고
    • Modeling the cosmic-ray-induced soft-error rate in integrated circuits: An overview
    • Jan.
    • Srinivasan, J.R., Modeling the Cosmic-Ray-Induced Soft-Error Rate in Integrated Circuits: An Overview. IBM Journal of Research and Development, Jan. 1996. 40(1): p. p. 77-89.
    • (1996) IBM Journal of Research and Development , vol.40 , Issue.1 , pp. 77-89
    • Srinivasan, J.R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.