Ultrashallow junction formation by self-limiting LTP and its application to sub-65-nm node MOSFETs

IEEE Transactions on Electron Devices

Volumn 52, Issue 6, 2005, Pages 1165-1171

  Shima, Akio ^a   Ashihara, Hiroshi ^a   Hiraiwa, Atsushi ^a   Mine, Toshiyuki ^a   Goto, Yasushi ^a  

^a HITACHI LTD   (Japan)

Author keywords

Amorphous materials; Complementary metal oxide semiconductor (CMOS) integrated circuits; Laser annealing; Preamorphization implantation; Rapid thermal annealed (RTA); Ultrashallow junction; YAG lasers

Indexed keywords

AMORPHOUS MATERIALS; CMOS INTEGRATED CIRCUITS; ELECTRIC CURRENTS; EXCIMER LASERS; GATES (TRANSISTOR); LASER PULSES; NEODYMIUM LASERS; RAPID THERMAL ANNEALING; SCANNING ELECTRON MICROSCOPY; SEMICONDUCTOR JUNCTIONS; TRANSMISSION ELECTRON MICROSCOPY;

LASER ANNEALING; PREAMORPHIZATION IMPLANTATION; ULTRASHALLOW JUNCTION; YAG LASERS;

MOSFET DEVICES;

EID: 21044438635     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2005.848081     Document Type: Article

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