Advanced source/drain engineering for box-shaped ultrashallow junction formation using laser annealing and pre-amorphization implantation in sub-100-nm SOI CMOS

IEEE Transactions on Electron Devices

Volumn 49, Issue 10, 2002, Pages 1748-1754

  Kim, Seong Dong ^a,b   Park, Cheol Min ^a,b   Woo, Jason C S ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

CMOS; Laser annealing; Pre amorphization implantation; Rapid thermal annealed (RTA); Series resistance; SOI; Source drain engineering; Ultrashallow junction

Indexed keywords

BOX SHAPED ULTRASHALLOW JUNCTION; LASER ANNEALING; PREAMORPHIZATION IMPLANTATION; SERIES RESISTANCE; SOURCE DRAIN ENGINEERING;

AMORPHIZATION; COMPUTER SIMULATION; ELECTRIC RESISTANCE; ION IMPLANTATION; LASER APPLICATIONS; MOSFET DEVICES; RAPID THERMAL ANNEALING; SEMICONDUCTOR DOPING; SEMICONDUCTOR JUNCTIONS; SHORT CIRCUIT CURRENTS; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS;

CMOS INTEGRATED CIRCUITS;

EID: 0036773157     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2002.803634     Document Type: Article

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