Ferroelectric 1-T memory device - Will it be viable for nonvolatile memory applications?

Materials Research Society Symposium Proceedings

Volumn 830, Issue , 2005, Pages 95-106

  Han, Jin Ping ^a,b  

^a NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

^b IBM Alliance 45Nm Technology R and D Project   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRICALLY ERASABLE PROGRAMMABLE READ ONLY MEMORY (EEPROM); FINITE RETENTION TIME; MAGNETIC TUNNEL JUNCTIONS; PROGRAMMING TIME;

DURABILITY; ELECTROMAGNETIC WAVE POLARIZATION; FERROELECTRIC DEVICES; LEAKAGE CURRENTS; NONVOLATILE STORAGE; PROM; SILICON NITRIDE; TUNNEL JUNCTIONS;

GATES (TRANSISTOR);

EID: 20344404460     PISSN: 02729172     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (25)

1. F. Masuoka, M. Assano et al. " A new Flash EEPROM cell using triple polysilicon technology", IEEE IEDM Tech. Dig., pp.464-467 (1984)
2. O. Auciello, J. F. Scott and R. Ramesh "The physics of ferroelectric memories", Physics Today, pp.22-27, July 1998.
3. G. F. Derbenwick and A. F. Isaacson "Ferroelectric memory: on the brink of breaking through", IEEE Circuits & Devices, pp.20-30, January, 2001.
4. B. Yang, S.S. Lee et. al. "Integrated process and reliability for SBT based ferroelectric memories" Journal of semiconductor technology and Science, Vol.1, No.3, Sept. 2001
5. K. Inomata "Present and future of magnetic RAM technology" IEICE TRANSACTIONS ON ELECTRONICS E84C (6), pp.740-746 June 2001
6. S. Lai and T. Lowrey "OUM - A 180 nm nonvolatile memory cell element technology for stand alone and embedded application" IEEE-IEDM 01-803 (2001)
7. H. Ishiwara "Recent progress in FET-type ferroelectric memories" IEEE-IEDM 03-263 (2003)
8. C. C. Broadbridge, J.-P Han, et.al. "Microstructure and physical properties of ferroelectric-gate memory capacitors with various buffer layers" 2001 Spring MRS proceeding (2001)
9. C. C. Broadbridge, J.-P Han, et. al. "Impact of processing conditions on the microstructural and Physical Characteristics of Ferroelectric-gate Memory Capacitors", 2001 MRS Fall Meeting, Boston, MA, Nov. 2001
10. J.-P. Han, X. Guo, et al, "Buffer layer dependence of memory effects for SrBi2Ta2O9 on Si" Integrated Ferroelectrics, Vol.34(1-4), pp.1505-1512 (2000)
11. J.-P. Han and T.P. Ma, "SrBi2Ta2O9 memory capacitor on Si with nitride buffer", Appl. Phys. Lett., Vol.72(10), pp.1185-1186 (1998)
12. J.-P. Han, S. M. Koo, C. A. Richter & E. M. Vogel "Influence of buffer layer thickness on memory effects of SrBi2Ta2O9/SiN/Si structures" Appl. Phys. Lett. Vol.85 (8), pp. 1439-1441 (2004)
13. K-H. Kim, J.-P. Han, S.-W. Jung and T. P. Ma, "Ferroelectric DRAM (FEDRAM) FET with metal/SrBi2Ta2O9/SiN/Si gate structure", Electron Device Letters, Vol.23, No.2, pp.82-84, Feb. 2002
14. X.W. Wang, T.P. Ma et. al. "Highly reliable silicon-nitride thin-films made by jet vapor-deposition" Jpn. J. Appl. Phys. Part 1 34 (2b), pp.955-958 Feb. 1995
15. D.M. Fleetwood, " Border traps in MOS device" IEEE Trans. Nucl. Sci. 39(2), Part 2, pp.269-271 (1992)
16. E. Tokumitsu, R. Nakamura, and H. Ishiwara, "Nonvolatile memory operations of metal-ferroelecrtic-insulator-semiconductor (MFIS) FET's using PLZT/STO/Si (100) structures," IEEE Electron Device Letters, Vol.18, No.4, pp.160-162 (1997)
17. T. Yamaguchi, M. Koyama, A. Takashima, and S. Takagi, "Improvement of memory characteristics of metal-ferroelectrics/insulating Buffer Layer/semiconductor structures by combination of pulsed laser deposited SrBi2Ta2O9 films and ultra-thin SiN buffer layers," Jpn. J. Appl. Phys., Vol.39, No.4B, pp.2058-2062 (2000)
18. T. P. Ma and J.-P. Han ""Why is nonvolatile ferroelectric memory field-effect transistor still elusive?" Electron Device Letters, Vol.23, No.7 pp.386-388, July, (2002)
19. Black paper C.T. Black et. al. "Suppression of ferroelectric polarization by an adjustable depolarization field" Appl. Phys. Lett., Vol.71, pp.2041 (1997)
20. M. Takahashi et. al. " Analysis and improvement of retention time of memorized state of metalferroelectric-insulator-semiconductor structure for ferroelectric gate FET memory" Jpn. J. Appl. Phys. Vol.40, pp.2923-2927, Part1, No.4B, April, 2001
21. SIA, The national technology roadmap for semiconductors technology needs: Semiconductor Industry Associations (SIA), 2001.
22. 3 on Si and its nanoscale piezoelectric properties", Appl. Phys. Lett., Vol.78, pp.2034 (2001)
23. W. Gong, J. F. li, X.C. Chu, Z.L. Gui, and L.T. Li "Single-crystal Nb-doped Pb(Zr,Ti)O3 thin films on Nb-doped SrTiO3 wafers with different orientations" Appl. Phys. Lett., Vol.85 (17), pp.3818-3820 (2001)
24. T.P. Ma and J-P Han, "A Ferroelectric Dynamic Random Access Memory" U.S. Patent 6067244 (2000)
25. J-P. Han and T.P. Ma "A capactor-less ferroelectric DRAM cell (FEDRAM)" Integrated Ferroelectrics, Vol.27, No.1-4, pp.1053-1062 (1999)