Novel highly linear CMOS buffer

Proceedings of the IEEE International Conference on Electronics, Circuits, and Systems

Volumn 3, Issue , 1998, Pages 369-371

  Hadidi, Kh ^a   Sobhi, J ^a   Hasankhaan, A ^a   Muramatsu, D ^a   Matsumoto, T ^a  

^a URMIA UNIVERSITY   (Iran)

Author keywords

[No Author keywords available]

Indexed keywords

LINEAR BUFFERS; ANALOG CMOS CIRCUIT; CONVENTIONAL DESIGN; DEEP SUB-MICRON PROCESS; HIGH INPUT IMPEDANCE; LARGE POWER; LOW OUTPUT IMPEDANCE; LOW VOLTAGES; MEDIUM RANGE;

CMOS INTEGRATED CIRCUITS; ELECTRIC IMPEDANCE; LINEAR INTEGRATED CIRCUITS; ANALOG CIRCUITS; BUFFER AMPLIFIERS;

BUFFER CIRCUITS; ELECTRIC IMPEDANCE;

EID: 0032285865     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Article

References (3)

1. Kh. Hadidi, G.C. Temes, "A novel input differential pair for improved -linearity buffer and S/H amplifier design," Proceedings of IEEE International Symposium On Circuits and Systems, pp. 93-96,May 1994
2. Kh. Hadidi, A. Khoei," A highly linear cascode-driver CMOS source follower buffer," Proceedings of IEEE International Conference On Electronics, Circuits, and Systems, pp. 12431246, Oct 1996
3. Kh. Hadidi, et. al., "An open-loop full CMOS 103MHz -61dB THD S/H circuit", IEEE Custom Integrated Circuits Conference, 1998