Dual-mode 700-Msamples/s 6-bit 200-Msamples/s 7-bit A/D converter in a 0.25-μm digital CMOS process

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 12, 2000, Pages 1760-1768

  Nagaraj, Krishnaswamy ^a   Martin, David A ^a   Wolfe, Mark ^a   Chattopadhyay, Ranjan ^a   Pavan, Shanthi ^a   Cancio, Jason ^a   Viswanathan, T R ^a  

^a TEXAS INSTRUMENTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; HARD DISK STORAGE; SIGNAL TO NOISE RATIO;

INTERPOLATING COMPARATORS;

ANALOG TO DIGITAL CONVERSION;

EID: 0034476097     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.890289     Document Type: Article

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