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Volumn , Issue , 2004, Pages 430-437

Thermal-aware IP visualization and placement for networks-on-chip architecture

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL METHODS; DECODING; ELECTRIC POWER UTILIZATION; NETWORK PROTOCOLS; ROUTERS; TEMPERATURE DISTRIBUTION;

EID: 17644418462     PISSN: 10636404     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (70)

References (20)
  • 1
    • 84961789594 scopus 로고    scopus 로고
    • Optimizing the mapping of LDPC Codes on parallel decoding architectures
    • G. Al-Rawi, J. Cioffi and M. Horowitz., "Optimizing the mapping of LDPC Codes on parallel decoding architectures", Proceedings of the IEEE ITCC, 2001. pp. 578-586.
    • (2001) Proceedings of the IEEE ITCC , pp. 578-586
    • Al-Rawi, G.1    Cioffi, J.2    Horowitz, M.3
  • 2
    • 0036149420 scopus 로고    scopus 로고
    • Networks on chips: A new SoC paradigm
    • January
    • L. Benini and G. De Micheli. Networks on chips: a new SoC paradigm, IEEE Computer, Volume 35, pp. 70-78, January 2002.
    • (2002) IEEE Computer , vol.35 , pp. 70-78
    • Benini, L.1    De Micheli, G.2
  • 5
    • 0034848112 scopus 로고    scopus 로고
    • Route packets, not wires: On-chip interconnection networks
    • June
    • W. J. Dally, B. Towles, "Route packets, not wires: on-chip interconnection networks," Proc. DAC, pp. 684-689, June 2001.
    • (2001) Proc. DAC , pp. 684-689
    • Dally, W.J.1    Towles, B.2
  • 8
    • 84893760422 scopus 로고    scopus 로고
    • Exploiting the routing flexibility for energy/performance aware mapping of regular NoC architectures
    • February
    • J. Hu and R. Marculescu, "Exploiting the Routing Flexibility for Energy/Performance Aware Mapping of Regular NoC Architectures", Proceedings of DATE 2003, February 2003.
    • (2003) Proceedings of DATE 2003
    • Hu, J.1    Marculescu, R.2
  • 12
    • 0031096505 scopus 로고    scopus 로고
    • Near Shannon limit performance of low density parity check codes
    • March
    • D. Mackay R. Neal, "Near Shannon limit performance of low density parity check codes", IEE Electronics Letters, Vol.33, no. 6, March 1997, pp 457-458.
    • (1997) IEE Electronics Letters , vol.33 , Issue.6 , pp. 457-458
    • Mackay, D.1    Neal, R.2
  • 14
    • 3042567207 scopus 로고    scopus 로고
    • Bandwidth-constrained mapping of cores onto NoC architectures
    • February
    • S. Murali and G. De Micheli, "Bandwidth-Constrained Mapping of Cores onto NoC Architectures", Proceedings of DATE'04, February 2004.
    • (2004) Proceedings of DATE'04
    • Murali, S.1    De Micheli, G.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.