Architectures and implementations of low-density parity check decoding algorithms

Midwest Symposium on Circuits and Systems

Volumn 3, Issue , 2002, Pages

  Yeo, Engling ^a   Nikolić, Borivoje ^a   Anantharam, Venkat ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; DECODING; PARALLEL PROCESSING SYSTEMS; VLSI CIRCUITS;

LOW DENSITY PARITY CHECK (LDPC) DECODERS;

SIGNAL ENCODING;

EID: 0036979337     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)

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